range->internal_base_addr = cpu_to_le32(addr);
range->range_data_size = size;
for (i = 0; i < le32_to_cpu(size); i += 4)
- *val++ = cpu_to_le32(iwl_read_prph(fwrt->trans, addr + i));
+ *val++ = cpu_to_le32(iwl_trans_read_prph(fwrt->trans, addr + i));
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
indirect_wr_addr += le32_to_cpu(offset);
indirect_rd_addr += le32_to_cpu(offset);
- if (!iwl_trans_grab_nic_access(fwrt->trans))
- return -EBUSY;
-
dphy_addr = (offset) ? WFPM_LMAC2_PS_CTL_RW : WFPM_LMAC1_PS_CTL_RW;
dphy_state = iwl_read_umac_prph_no_grab(fwrt->trans, dphy_addr);
*val++ = cpu_to_le32(prph_val);
}
- iwl_trans_release_nic_access(fwrt->trans);
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
range->internal_base_addr = cpu_to_le32(addr);
range->range_data_size = reg->dev_addr.size;
- iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
- le32_to_cpu(reg->dev_addr.size));
+ iwl_trans_read_mem_bytes_no_grab(fwrt->trans, addr, range->data,
+ le32_to_cpu(reg->dev_addr.size));
if (reg->sub_type == IWL_FW_INI_REGION_DEVICE_MEMORY_SUBTYPE_HW_SMEM &&
fwrt->sanitize_ops && fwrt->sanitize_ops->frob_txf)
range->internal_base_addr = cpu_to_le32(addr);
range->range_data_size = reg->internal_buffer.size;
- iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
- le32_to_cpu(reg->internal_buffer.size));
+ iwl_trans_read_mem_bytes_no_grab(fwrt->trans, addr, range->data,
+ le32_to_cpu(reg->internal_buffer.size));
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
if (!iwl_ini_txf_iter(fwrt, reg_data, idx))
return -EIO;
- if (!iwl_trans_grab_nic_access(fwrt->trans))
- return -EBUSY;
-
range->fifo_hdr.fifo_num = cpu_to_le32(iter->fifo);
range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
range->range_data_size = cpu_to_le32(iter->fifo_size + registers_size);
reg_dump, iter->fifo_size);
out:
- iwl_trans_release_nic_access(fwrt->trans);
-
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
range->internal_base_addr = cpu_to_le32(addr);
range->range_data_size = reg->dev_addr.size;
- if (!iwl_trans_grab_nic_access(fwrt->trans))
- return -EBUSY;
-
indirect_rd_wr_addr += le32_to_cpu(offset);
dphy_addr = offset ? WFPM_LMAC2_PS_CTL_RW : WFPM_LMAC1_PS_CTL_RW;
DPHYIP_INDIRECT_RD_SHIFT);
}
- iwl_trans_release_nic_access(fwrt->trans);
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
if (!rxf_data.size)
return -EIO;
- if (!iwl_trans_grab_nic_access(fwrt->trans))
- return -EBUSY;
-
range->fifo_hdr.fifo_num = cpu_to_le32(rxf_data.fifo_num);
range->fifo_hdr.num_of_registers = cpu_to_le32(registers_num);
range->range_data_size = cpu_to_le32(rxf_data.size + registers_size);
*data++ = cpu_to_le32(iwl_trans_read_prph(fwrt->trans, addr));
out:
- iwl_trans_release_nic_access(fwrt->trans);
-
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
range->internal_base_addr = cpu_to_le32(addr);
range->range_data_size = err_table->size;
- iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
- le32_to_cpu(err_table->size));
+ iwl_trans_read_mem_bytes_no_grab(fwrt->trans, addr, range->data,
+ le32_to_cpu(err_table->size));
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
range->internal_base_addr = cpu_to_le32(addr);
range->range_data_size = special_mem->size;
- iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
- le32_to_cpu(special_mem->size));
+ iwl_trans_read_mem_bytes_no_grab(fwrt->trans, addr, range->data,
+ le32_to_cpu(special_mem->size));
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
u32 prph_data;
int i;
- if (!iwl_trans_grab_nic_access(fwrt->trans))
- return -EBUSY;
-
range->range_data_size = reg->dev_addr.size;
for (i = 0; i < (le32_to_cpu(reg->dev_addr.size) / 4); i++) {
prph_data =
(i % 2) ?
DBGI_SRAM_TARGET_ACCESS_RDATA_MSB :
DBGI_SRAM_TARGET_ACCESS_RDATA_LSB);
- if (iwl_trans_is_hw_error_value(prph_data)) {
- iwl_trans_release_nic_access(fwrt->trans);
+ if (iwl_trans_is_hw_error_value(prph_data))
return -EBUSY;
- }
*val++ = cpu_to_le32(prph_data);
}
- iwl_trans_release_nic_access(fwrt->trans);
+
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
fwrt->trans->dbg.imr_data.imr_curr_addr = imr_curr_addr + size_to_dump;
fwrt->trans->dbg.imr_data.imr2sram_remainbyte -= size_to_dump;
- iwl_trans_read_mem_bytes(fwrt->trans, sram_addr, range->data,
- size_to_dump);
+ iwl_trans_read_mem_bytes_no_grab(fwrt->trans, sram_addr, range->data,
+ size_to_dump);
return sizeof(*range) + le32_to_cpu(range->range_data_size);
}
struct iwl_fw_ini_monitor_dump *data,
const struct iwl_fw_mon_regs *addrs)
{
- if (!iwl_trans_grab_nic_access(fwrt->trans)) {
- IWL_ERR(fwrt, "Failed to get monitor header\n");
- return NULL;
- }
-
data->write_ptr = iwl_get_mon_reg(fwrt, alloc_id,
&addrs->write_ptr);
if (fwrt->trans->mac_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
data->cur_frag = iwl_get_mon_reg(fwrt, alloc_id,
&addrs->cur_frag);
- iwl_trans_release_nic_access(fwrt->trans);
-
data->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
return data->data;
* the first range or NULL if failed to fill headers.
* @fill_range: copies a given memory range into the dump.
* Returns the size of the range or negative error value otherwise.
+ * @requires_nic_access: indicates to dump only if NIC access was acquired
*/
struct iwl_dump_ini_mem_ops {
u32 (*get_num_of_ranges)(struct iwl_fw_runtime *fwrt,
int (*fill_range)(struct iwl_fw_runtime *fwrt,
struct iwl_dump_ini_region_data *reg_data,
void *range, int idx);
+ bool requires_nic_access;
};
struct iwl_fw_ini_dump_entry {
}
static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt,
- struct iwl_fw_ini_dump_entry *entry)
+ struct iwl_fw_ini_dump_entry *entry,
+ bool have_nic_access)
{
struct iwl_dump_ini_region_data *reg_data = &entry->reg_data;
struct iwl_fw_ini_region_tlv *reg = (void *)reg_data->reg_tlv->data;
u32 free_size;
u64 header_size;
+ if (!have_nic_access && ops->requires_nic_access)
+ goto out_err;
+
tlv = (void *)entry->data;
header = (void *)tlv->data;
.get_size = iwl_dump_ini_mon_smem_get_size,
.fill_mem_hdr = iwl_dump_ini_mon_smem_fill_header,
.fill_range = iwl_dump_ini_mon_smem_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_DRAM_BUFFER] = {
.get_num_of_ranges = iwl_dump_ini_mon_dram_ranges,
.get_size = iwl_dump_ini_mon_dram_get_size,
.fill_mem_hdr = iwl_dump_ini_mon_dram_fill_header,
.fill_range = iwl_dump_ini_mon_dram_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_TXF] = {
.get_num_of_ranges = iwl_dump_ini_txf_ranges,
.get_size = iwl_dump_ini_txf_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_txf_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_RXF] = {
.get_num_of_ranges = iwl_dump_ini_single_range,
.get_size = iwl_dump_ini_rxf_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_rxf_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_LMAC_ERROR_TABLE] = {
.get_num_of_ranges = iwl_dump_ini_single_range,
.get_size = iwl_dump_ini_err_table_get_size,
.fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
.fill_range = iwl_dump_ini_err_table_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_UMAC_ERROR_TABLE] = {
.get_num_of_ranges = iwl_dump_ini_single_range,
.get_size = iwl_dump_ini_err_table_get_size,
.fill_mem_hdr = iwl_dump_ini_err_table_fill_header,
.fill_range = iwl_dump_ini_err_table_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_RSP_OR_NOTIF] = {
.get_num_of_ranges = iwl_dump_ini_single_range,
.get_size = iwl_dump_ini_mem_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_dev_mem_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_PERIPHERY_MAC] = {
.get_num_of_ranges = iwl_dump_ini_mem_ranges,
.get_size = iwl_dump_ini_mem_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_prph_mac_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_PERIPHERY_PHY] = {
.get_num_of_ranges = iwl_dump_ini_mem_ranges,
.get_size = iwl_dump_ini_mem_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_prph_phy_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_PERIPHERY_MAC_RANGE] = {
.get_num_of_ranges = iwl_dump_ini_mem_block_ranges,
.get_size = iwl_dump_ini_mem_block_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_prph_mac_block_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_PERIPHERY_PHY_RANGE] = {
.get_num_of_ranges = iwl_dump_ini_mem_block_ranges,
.get_size = iwl_dump_ini_mem_block_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_prph_phy_block_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_PERIPHERY_AUX] = {},
[IWL_FW_INI_REGION_PAGING] = {
.get_size = iwl_dump_ini_imr_get_size,
.fill_mem_hdr = iwl_dump_ini_imr_fill_header,
.fill_range = iwl_dump_ini_imr_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_PCI_IOSF_CONFIG] = {
.get_num_of_ranges = iwl_dump_ini_mem_ranges,
.get_size = iwl_dump_ini_special_mem_get_size,
.fill_mem_hdr = iwl_dump_ini_special_mem_fill_header,
.fill_range = iwl_dump_ini_special_mem_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_DBGI_SRAM] = {
.get_num_of_ranges = iwl_dump_ini_mem_ranges,
.get_size = iwl_dump_ini_mon_dbgi_get_size,
.fill_mem_hdr = iwl_dump_ini_mon_dbgi_fill_header,
.fill_range = iwl_dump_ini_dbgi_sram_iter,
+ .requires_nic_access = true,
},
[IWL_FW_INI_REGION_PERIPHERY_SNPS_DPHYIP] = {
.get_num_of_ranges = iwl_dump_ini_mem_ranges,
.get_size = iwl_dump_ini_mem_get_size,
.fill_mem_hdr = iwl_dump_ini_mem_fill_header,
.fill_range = iwl_dump_ini_prph_snps_dphyip_iter,
+ .requires_nic_access = true,
},
};
enum iwl_dump_ini_region_selector which)
{
struct iwl_fw_ini_dump_entry *entry, *tmp;
+ bool have_nic_access;
u32 size = 0;
+ have_nic_access = iwl_trans_grab_nic_access(fwrt->trans);
+
list_for_each_entry_safe(entry, tmp, list, list) {
u32 dp = entry->region_dump_policy;
break;
}
- size += iwl_dump_ini_mem(fwrt, entry);
+ size += iwl_dump_ini_mem(fwrt, entry, have_nic_access);
+
+ if (have_nic_access)
+ iwl_trans_resched_with_nic_access(fwrt->trans);
}
+ if (have_nic_access)
+ iwl_trans_release_nic_access(fwrt->trans);
+
return size;
}