drm/amdgpu/gfx: add eop size and alignment to shadow info

This is used by firmware for compute user queues.

Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index efd61a1ccc661e6c987f028f1e206721ed362805..eebad3378352d1629436390752570b01182400d1 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -328,6 +328,8 @@ struct amdgpu_gfx_shadow_info {
        u32 shadow_alignment;
        u32 csa_size;
        u32 csa_alignment;
+       u32 eop_size;
+       u32 eop_alignment;
 };
 
 struct amdgpu_gfx_funcs {

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index f4d4dd5dd07b5987d5bd07698a01b365fe50ecbd..39284b5ddefdddf04358e0b3c76e9573a4739530 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -1053,10 +1053,14 @@ static void gfx_v11_0_select_me_pipe_q(struct amdgpu_device *adev,
 static void gfx_v11_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev,
                                         struct amdgpu_gfx_shadow_info *shadow_info)
 {
+       /* for gfx */
        shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
        shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
        shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
        shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
+       /* for compute */
+       shadow_info->eop_size = GFX11_MEC_HPD_SIZE;
+       shadow_info->eop_alignment = 256;
 }
 
 static int gfx_v11_0_get_gfx_shadow_info(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index f9cae666669738f24a21845bda2dd504304a8008..3db2eecd723db69fb505d5c91c4bc35facc24c87 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -910,10 +910,14 @@ static void gfx_v12_0_select_me_pipe_q(struct amdgpu_device *adev,
 static void gfx_v12_0_get_gfx_shadow_info_nocheck(struct amdgpu_device *adev,
                                                  struct amdgpu_gfx_shadow_info *shadow_info)
 {
+       /* for gfx */
        shadow_info->shadow_size = MQD_SHADOW_BASE_SIZE;
        shadow_info->shadow_alignment = MQD_SHADOW_BASE_ALIGNMENT;
        shadow_info->csa_size = MQD_FWWORKAREA_SIZE;
        shadow_info->csa_alignment = MQD_FWWORKAREA_ALIGNMENT;
+       /* for compute */
+       shadow_info->eop_size = GFX12_MEC_HPD_SIZE;
+       shadow_info->eop_alignment = 256;
 }
 
 static int gfx_v12_0_get_gfx_shadow_info(struct amdgpu_device *adev,