]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
x86-64: Check Prefer_FSRM in ifunc-memmove.h
authorH.J. Lu <hjl.tools@gmail.com>
Mon, 21 May 2018 23:54:46 +0000 (16:54 -0700)
committerH.J. Lu <hjl.tools@gmail.com>
Mon, 21 May 2018 23:54:59 +0000 (16:54 -0700)
Although the REP MOVSB implementations of memmove, memcpy and mempcpy
aren't used by the current processors, this patch adds Prefer_FSRM
check in ifunc-memmove.h so that they can be used in the future.

* sysdeps/x86/cpu-features.h (bit_arch_Prefer_FSRM): New.
(index_arch_Prefer_FSRM): Likewise.
* sysdeps/x86/cpu-tunables.c (TUNABLE_CALLBACK (set_hwcaps)):
Also check Prefer_FSRM.
* sysdeps/x86_64/multiarch/ifunc-memmove.h (IFUNC_SELECTOR):
Also return OPTIMIZE (erms) for Prefer_FSRM.

ChangeLog
sysdeps/x86/cpu-features.h
sysdeps/x86/cpu-tunables.c
sysdeps/x86_64/multiarch/ifunc-memmove.h

index c8ff9d45c83ff11c29e0f359023e67e14b83e683..ee8f7452294a7932de4240a27dbed90561c6fe2a 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,12 @@
+2018-05-21  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * sysdeps/x86/cpu-features.h (bit_arch_Prefer_FSRM): New.
+       (index_arch_Prefer_FSRM): Likewise.
+       * sysdeps/x86/cpu-tunables.c (TUNABLE_CALLBACK (set_hwcaps)):
+       Also check Prefer_FSRM.
+       * sysdeps/x86_64/multiarch/ifunc-memmove.h (IFUNC_SELECTOR):
+       Also return OPTIMIZE (erms) for Prefer_FSRM.
+
 2018-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 
        * sysdeps/x86/cpu-features.h (bit_cpu_FSRM): New.
index 2088bd73eef8a98e68ff21c192898e053d1b5a68..624e681e96a66be54afb20268f1df342061e47a7 100644 (file)
@@ -40,6 +40,7 @@
 #define bit_arch_Prefer_No_AVX512              (1 << 20)
 #define bit_arch_MathVec_Prefer_No_AVX512      (1 << 21)
 #define bit_arch_XSAVEC_Usable                 (1 << 22)
+#define bit_arch_Prefer_FSRM                   (1 << 23)
 
 /* CPUID Feature flags.  */
 
@@ -264,6 +265,7 @@ extern const struct cpu_features *__get_cpu_features (void)
 # define index_arch_Prefer_No_AVX512   FEATURE_INDEX_1
 # define index_arch_MathVec_Prefer_No_AVX512 FEATURE_INDEX_1
 # define index_arch_XSAVEC_Usable      FEATURE_INDEX_1
+# define index_arch_Prefer_FSRM                FEATURE_INDEX_1
 
 #endif /* !__ASSEMBLER__ */
 
index a21a615ec2ad251a92736b939f2a8ba5615881f7..af761dcbbc2d3a140659864daeb4d248102adf4d 100644 (file)
@@ -241,6 +241,8 @@ TUNABLE_CALLBACK (set_hwcaps) (tunable_val_t *valp)
          CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH (n, cpu_features,
                                                Slow_SSE4_2, SSE4_2,
                                                disable, 11);
+         CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Prefer_FSRM,
+                                      disable, 11);
          break;
        case 13:
          if (disable)
index a2ffba053128064809fd9d639a4a783669739872..5b1eb1c92c2f199be9339b65fe48a156f046223c 100644 (file)
@@ -41,7 +41,8 @@ IFUNC_SELECTOR (void)
 {
   const struct cpu_features* cpu_features = __get_cpu_features ();
 
-  if (CPU_FEATURES_ARCH_P (cpu_features, Prefer_ERMS))
+  if (CPU_FEATURES_ARCH_P (cpu_features, Prefer_ERMS)
+      || CPU_FEATURES_ARCH_P (cpu_features, Prefer_FSRM))
     return OPTIMIZE (erms);
 
   if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable)