+2018-05-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ * sysdeps/x86/cpu-features.h (bit_arch_Prefer_FSRM): New.
+ (index_arch_Prefer_FSRM): Likewise.
+ * sysdeps/x86/cpu-tunables.c (TUNABLE_CALLBACK (set_hwcaps)):
+ Also check Prefer_FSRM.
+ * sysdeps/x86_64/multiarch/ifunc-memmove.h (IFUNC_SELECTOR):
+ Also return OPTIMIZE (erms) for Prefer_FSRM.
+
2018-05-21 H.J. Lu <hongjiu.lu@intel.com>
* sysdeps/x86/cpu-features.h (bit_cpu_FSRM): New.
#define bit_arch_Prefer_No_AVX512 (1 << 20)
#define bit_arch_MathVec_Prefer_No_AVX512 (1 << 21)
#define bit_arch_XSAVEC_Usable (1 << 22)
+#define bit_arch_Prefer_FSRM (1 << 23)
/* CPUID Feature flags. */
# define index_arch_Prefer_No_AVX512 FEATURE_INDEX_1
# define index_arch_MathVec_Prefer_No_AVX512 FEATURE_INDEX_1
# define index_arch_XSAVEC_Usable FEATURE_INDEX_1
+# define index_arch_Prefer_FSRM FEATURE_INDEX_1
#endif /* !__ASSEMBLER__ */
CHECK_GLIBC_IFUNC_ARCH_NEED_CPU_BOTH (n, cpu_features,
Slow_SSE4_2, SSE4_2,
disable, 11);
+ CHECK_GLIBC_IFUNC_ARCH_BOTH (n, cpu_features, Prefer_FSRM,
+ disable, 11);
break;
case 13:
if (disable)
{
const struct cpu_features* cpu_features = __get_cpu_features ();
- if (CPU_FEATURES_ARCH_P (cpu_features, Prefer_ERMS))
+ if (CPU_FEATURES_ARCH_P (cpu_features, Prefer_ERMS)
+ || CPU_FEATURES_ARCH_P (cpu_features, Prefer_FSRM))
return OPTIMIZE (erms);
if (CPU_FEATURES_ARCH_P (cpu_features, AVX512F_Usable)