sync socfpga common u-boot dts

The dtsi for socfpga common should
turn on L2 and memory and no reason not
to do so

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>

diff --git a/arch/arm/dts/socfpga-common-u-boot.dtsi b/arch/arm/dts/socfpga-common-u-boot.dtsi
index eb3d1039314f4745c81e4fcb42126c9a5dd13a2a..695242bec21e3301a8d886ba39fd1c2df41bb6db 100644 (file)
--- a/arch/arm/dts/socfpga-common-u-boot.dtsi
+++ b/arch/arm/dts/socfpga-common-u-boot.dtsi
@@ -5,6 +5,10 @@
  * Copyright (c) 2019 Simon Goldschmidt
  */
 /{
+       memory {
+               bootph-all;
+       };
+
        soc {
                bootph-all;
        };
@@ -14,6 +18,10 @@
        bootph-all;
 };
 
+&L2 {
+       bootph-all;
+};
+
 &rst {
        bootph-all;
 };