Add pmaxsd and pminsd support for x86 32 bit

Support pmaxsd and pminsd instructions in guest_x86_toIR.c and host_x86_isel.c
and modify the none/tests/x86/sse4-x86.stdout.exp to match pmaxsd and
pminsd support.

diff --git a/NEWS b/NEWS
index 252c8e8ec0bac1fece3ab479a546816b7e11e6d0..3b76257d659ae82c2118baa9d2d570759035702e 100644 (file)
--- a/NEWS
+++ b/NEWS
@@ -25,6 +25,7 @@ bugzilla (https://bugs.kde.org/enter_bug.cgi?product=valgrind) rather
 than mailing the developers (or mailing lists) directly -- bugs that
 are not entered into bugzilla tend to get forgotten about or ignored.
 
+510864  Add SSE4.1 PMAXSD and PMINSD instructions support for 32-bit x86
 413369  unhandled amd64-darwin syscall: unix:151 (getpgid)
 487055  memcheck/tests/x86-linux/scalar fails running in Docker
 511329  Darwin and FreeBSD: Move setting of carry flag out of

diff --git a/VEX/priv/guest_x86_toIR.c b/VEX/priv/guest_x86_toIR.c
index 8ecfad155c2c85bf8f7445b96d3374f1942af73a..a91551f562507eeb3e9bc35e4b2f02068976cc88 100644 (file)
--- a/VEX/priv/guest_x86_toIR.c
+++ b/VEX/priv/guest_x86_toIR.c
@@ -12995,6 +12995,26 @@ DisResult disInstr_X86_WRK (
       goto decode_success;
    }
 
+   /* 66 0F 38 39 /r  - PMINSD xmm1, xmm2/m128
+      66 0F 38 3D /r  - PMAXSD xmm1, xmm2/m128
+      66 prefix (sz == 2): SSE2/SSE4 XMM instructions (128-bit)
+      0F 38 is the secondary escape used for SSSE3, SSE4, and later extensions
+      39 = PMINSD (minimum of packed signed 32-bit integers)
+      3D = PMAXSD (maximum of packed signed 32-bit integers)
+      reference: Intel Software Developer Manual (Volume 2: Instruction Set Reference)  */
+   if (sz == 2
+       && insn[0] == 0x0F && insn[1] == 0x38
+       && (insn[2] == 0x39 || insn[2] == 0x3D)) {
+     Bool isMAX = insn[2] == 0x3D;
+     delta = dis_SSEint_E_to_G(
+         sorb, delta+3,
+         isMAX ? "pmaxsd" : "pminsd",
+         isMAX ? Iop_Max32Sx4 : Iop_Min32Sx4,
+         False
+         );
+     goto decode_success;
+   }
+
    /* 66 0F 3A 0B /r ib = ROUNDSD imm8, xmm2/m64, xmm1
       (Partial implementation only -- only deal with cases where
       the rounding mode is specified directly by the immediate byte.)
@@ -13072,6 +13092,8 @@ DisResult disInstr_X86_WRK (
              nameIReg(sz, gregOfRM(modrm)));
       }
 
+
+
       IRTemp res = gen_LZCNT(ty, src);
       putIReg(sz, gregOfRM(modrm), mkexpr(res));
 

diff --git a/VEX/priv/host_x86_isel.c b/VEX/priv/host_x86_isel.c
index 6559ad51de275895bcd211823533d63cd9983644..0dbd0fb8a20fa008c1e1cd62bfe05cfd8921f087 100644 (file)
--- a/VEX/priv/host_x86_isel.c
+++ b/VEX/priv/host_x86_isel.c
@@ -3867,6 +3867,12 @@ static HReg iselVecExpr_wrk ( ISelEnv* env, const IRExpr* e )
       case Iop_NarrowBin16to8x16:
          fn = (HWord)h_generic_calc_NarrowBin16to8x16;
          goto do_SseAssistedBinary;
+      case Iop_Max32Sx4:
+         fn = (HWord)h_generic_calc_Max32Sx4;
+         goto do_SseAssistedBinary;
+      case Iop_Min32Sx4:
+         fn = (HWord)h_generic_calc_Min32Sx4;
+         goto do_SseAssistedBinary;
       do_SseAssistedBinary: {
          /* As with the amd64 case (where this is copied from) we
             generate pretty bad code. */

diff --git a/none/tests/amd64/sse4-64.c b/none/tests/amd64/sse4-64.c
index 7048f96f6706e44c7bfcf8bcf6004fd4e40d791c..fc30963448f5a118b85153b2b6a86cc7e81b5f11 100644 (file)
--- a/none/tests/amd64/sse4-64.c
+++ b/none/tests/amd64/sse4-64.c
@@ -1536,17 +1536,6 @@ void test_PMINSB ( void )
    }
 }
 
-void test_PMINSD ( void )
-{
-   V128 src, dst;
-   Int i;
-   for (i = 0; i < 10; i++) {
-      randV128(&src);
-      randV128(&dst);
-      DO_mandr_r("pminsd", src, dst);
-   }
-}
-
 void test_PMINUD ( void )
 {
    V128 src, dst;

diff --git a/none/tests/sse4-common.h b/none/tests/sse4-common.h
index 1e08218b5e4ce0ec86cd583a578c690287c8cf70..e3341186bd251768f10da877b118645dc5cf656d 100644 (file)
--- a/none/tests/sse4-common.h
+++ b/none/tests/sse4-common.h
@@ -263,4 +263,15 @@ static inline void test_PMAXSD ( void )
    }
 }
 
+static inline void test_PMINSD ( void )
+{
+   V128 src, dst;
+   Int i;
+   for (i = 0; i < 10; i++) {
+      randV128(&src);
+      randV128(&dst);
+      DO_mandr_r("pminsd", src, dst);
+   }
+}
+
 #endif /* __SSE4_COMMON_H */

diff --git a/none/tests/x86/sse4-x86.c b/none/tests/x86/sse4-x86.c
index 7e4189852f67611423f1ddb37a45e63b90716b29..f47f185bf642bf5ff4ad4535868d5b68433bda82 100644 (file)
--- a/none/tests/x86/sse4-x86.c
+++ b/none/tests/x86/sse4-x86.c
@@ -105,6 +105,7 @@ int main(void)
    // ------ SSE 4.1 ------
    test_PINSRD();
    test_PMAXSD();
+   test_PMINSD();
 
    return 0;
 }

diff --git a/none/tests/x86/sse4-x86.stdout.exp b/none/tests/x86/sse4-x86.stdout.exp
index 9642a375610b8a5b3f9e23703dd02ce2a159255b..99822c46cf570ad4e379b41a2b159b4128432053 100644 (file)
--- a/none/tests/x86/sse4-x86.stdout.exp
+++ b/none/tests/x86/sse4-x86.stdout.exp
@@ -6,3 +6,43 @@ r     pinsrd $2 3bd127afa6e9c369 55555555555555555555555555555555 55555555a6e9c3
 m     pinsrd $2 3bd127afa6e9c369 55555555555555555555555555555555 55555555a6e9c3695555555555555555
 r     pinsrd $3 0d6a95fac528657d 55555555555555555555555555555555 c528657d555555555555555555555555
 m     pinsrd $3 0d6a95fac528657d 55555555555555555555555555555555 c528657d555555555555555555555555
+r     pmaxsd 60b160857d45c48447b8d8c0eeef1e50 b6d2fb5aa7bc5127fe9915e556a044b2 60b160857d45c48447b8d8c056a044b2
+m     pmaxsd 60b160857d45c48447b8d8c0eeef1e50 b6d2fb5aa7bc5127fe9915e556a044b2 60b160857d45c48447b8d8c056a044b2
+r     pmaxsd 19a348215c3a67fd399182c2dbcc2d38 065d77195d623e6b842adc6450659e17 19a348215d623e6b399182c250659e17
+m     pmaxsd 19a348215c3a67fd399182c2dbcc2d38 065d77195d623e6b842adc6450659e17 19a348215d623e6b399182c250659e17
+r     pmaxsd d89998df5035ed364a4bc43968bc40e5 cb509970b8136c85d740b80eb7839b97 d89998df5035ed364a4bc43968bc40e5
+m     pmaxsd d89998df5035ed364a4bc43968bc40e5 cb509970b8136c85d740b80eb7839b97 d89998df5035ed364a4bc43968bc40e5
+r     pmaxsd f9dd4a29f8c093db56b01a12b0ca1583 5ff85bc9535c191fd3a727d1a705f65d 5ff85bc9535c191f56b01a12b0ca1583
+m     pmaxsd f9dd4a29f8c093db56b01a12b0ca1583 5ff85bc9535c191fd3a727d1a705f65d 5ff85bc9535c191f56b01a12b0ca1583
+r     pmaxsd d8bc5c6dee699597398e0039cf03663d 20a1bb92cbc97fe8542da4983df76c96 20a1bb92ee699597542da4983df76c96
+m     pmaxsd d8bc5c6dee699597398e0039cf03663d 20a1bb92cbc97fe8542da4983df76c96 20a1bb92ee699597542da4983df76c96
+r     pmaxsd d182c916cebc2e17cfaff39be272ef40 6897b536bbe4da8a369dab4f9465b86e 6897b536cebc2e17369dab4fe272ef40
+m     pmaxsd d182c916cebc2e17cfaff39be272ef40 6897b536bbe4da8a369dab4f9465b86e 6897b536cebc2e17369dab4fe272ef40
+r     pmaxsd 407b8d9035449b06f4e06e2205236eb7 95264321bf3b68b255c2b9e2c95c9810 407b8d9035449b0655c2b9e205236eb7
+m     pmaxsd 407b8d9035449b06f4e06e2205236eb7 95264321bf3b68b255c2b9e2c95c9810 407b8d9035449b0655c2b9e205236eb7
+r     pmaxsd 81f2a547be8d181184ededbc53239dcf 019963bf7459630b8d69483df7e8c6a9 019963bf7459630b8d69483d53239dcf
+m     pmaxsd 81f2a547be8d181184ededbc53239dcf 019963bf7459630b8d69483df7e8c6a9 019963bf7459630b8d69483d53239dcf
+r     pmaxsd f0350ca70523e0e45ba1ec54e87d39b3 0a3e0f7c75cb0842b95ed64d3b13ff64 0a3e0f7c75cb08425ba1ec543b13ff64
+m     pmaxsd f0350ca70523e0e45ba1ec54e87d39b3 0a3e0f7c75cb0842b95ed64d3b13ff64 0a3e0f7c75cb08425ba1ec543b13ff64
+r     pmaxsd e98ebd1ca893312a54cae7d5e13dfe91 0a5f45c55f1c9202b76ddefcb0ebfe6e 0a5f45c55f1c920254cae7d5e13dfe91
+m     pmaxsd e98ebd1ca893312a54cae7d5e13dfe91 0a5f45c55f1c9202b76ddefcb0ebfe6e 0a5f45c55f1c920254cae7d5e13dfe91
+r     pminsd c84ab713406845904d325b2d5a70a792 5f490104ced83ff86262dd37727c80f3 c84ab713ced83ff84d325b2d5a70a792
+m     pminsd c84ab713406845904d325b2d5a70a792 5f490104ced83ff86262dd37727c80f3 c84ab713ced83ff84d325b2d5a70a792
+r     pminsd e9b5f3f66b2e58c121a6c3476d21f1e5 63483da65c8c49d096084deb9ed0411e e9b5f3f65c8c49d096084deb9ed0411e
+m     pminsd e9b5f3f66b2e58c121a6c3476d21f1e5 63483da65c8c49d096084deb9ed0411e e9b5f3f65c8c49d096084deb9ed0411e
+r     pminsd a81b6e33c572a86aacf29b0f395c98b4 73a8f718a8c3ec352e2dac0350f6fd1c a81b6e33a8c3ec35acf29b0f395c98b4
+m     pminsd a81b6e33c572a86aacf29b0f395c98b4 73a8f718a8c3ec352e2dac0350f6fd1c a81b6e33a8c3ec35acf29b0f395c98b4
+r     pminsd 61c82534e9bf6f37c9e25f72d82e582b ecb42ac54b0966d4089b756aa3f77018 ecb42ac5e9bf6f37c9e25f72a3f77018
+m     pminsd 61c82534e9bf6f37c9e25f72d82e582b ecb42ac54b0966d4089b756aa3f77018 ecb42ac5e9bf6f37c9e25f72a3f77018
+r     pminsd 6f07136773a2ead356428c5a66a2ec77 28bad218e4ebf159ff1f240eb3e1553f 28bad218e4ebf159ff1f240eb3e1553f
+m     pminsd 6f07136773a2ead356428c5a66a2ec77 28bad218e4ebf159ff1f240eb3e1553f 28bad218e4ebf159ff1f240eb3e1553f
+r     pminsd 3026343700a654eb2ddd9db4ffc411c4 8404eb7f0cf4ca6fee8536da9dbf68bc 8404eb7f00a654ebee8536da9dbf68bc
+m     pminsd 3026343700a654eb2ddd9db4ffc411c4 8404eb7f0cf4ca6fee8536da9dbf68bc 8404eb7f00a654ebee8536da9dbf68bc
+r     pminsd ff6f850f2c57ea2a2c810e6dc1a1833d 5cdf726562b02dc2b39925ba7d9d67bc ff6f850f2c57ea2ab39925bac1a1833d
+m     pminsd ff6f850f2c57ea2a2c810e6dc1a1833d 5cdf726562b02dc2b39925ba7d9d67bc ff6f850f2c57ea2ab39925bac1a1833d
+r     pminsd 372f015d9242e83d2ef85b6fc544fd0f 0c9761367fac55ff28276f9a6e880c6b 0c9761369242e83d28276f9ac544fd0f
+m     pminsd 372f015d9242e83d2ef85b6fc544fd0f 0c9761367fac55ff28276f9a6e880c6b 0c9761369242e83d28276f9ac544fd0f
+r     pminsd 36b2a38dcef18acf0e0f01a829ba3c66 f078b65e01737fd22bfa8f668c8b14f4 f078b65ecef18acf0e0f01a88c8b14f4
+m     pminsd 36b2a38dcef18acf0e0f01a829ba3c66 f078b65e01737fd22bfa8f668c8b14f4 f078b65ecef18acf0e0f01a88c8b14f4
+r     pminsd 57436a097df30b8daa927a03090dfc6d 65ce6d498492e7e796df010bf4b23b84 57436a098492e7e796df010bf4b23b84
+m     pminsd 57436a097df30b8daa927a03090dfc6d 65ce6d498492e7e796df010bf4b23b84 57436a098492e7e796df010bf4b23b84