]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: rtw89: Fix rtw89_mac_power_switch() for USB
authorBitterblue Smith <rtl8821cerfe2@gmail.com>
Mon, 30 Jun 2025 20:45:55 +0000 (23:45 +0300)
committerPing-Ke Shih <pkshih@realtek.com>
Fri, 4 Jul 2025 02:46:46 +0000 (10:46 +0800)
Clear some bits in some registers in order to allow RTL8851BU to power
on. This is done both when powering on and when powering off because
that's what the vendor driver does.

Also tested with RTL8832BU and RTL8832CU.

Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/a39da939-d640-4486-ad38-f658f220afc8@gmail.com
drivers/net/wireless/realtek/rtw89/mac.c
drivers/net/wireless/realtek/rtw89/reg.h

index 877944cbb8da30a8ed595254e85e2ed35812228b..ff4335ef4033e6c024709a4d6267ede5b5dbb23e 100644 (file)
@@ -1440,6 +1440,23 @@ void rtw89_mac_notify_wake(struct rtw89_dev *rtwdev)
        rtw89_mac_send_rpwm(rtwdev, state, true);
 }
 
+static void rtw89_mac_power_switch_boot_mode(struct rtw89_dev *rtwdev)
+{
+       u32 boot_mode;
+
+       if (rtwdev->hci.type != RTW89_HCI_TYPE_USB)
+               return;
+
+       boot_mode = rtw89_read32_mask(rtwdev, R_AX_GPIO_MUXCFG, B_AX_BOOT_MODE);
+       if (!boot_mode)
+               return;
+
+       rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFN_ONMAC);
+       rtw89_write32_clr(rtwdev, R_AX_SYS_STATUS1, B_AX_AUTO_WLPON);
+       rtw89_write32_clr(rtwdev, R_AX_GPIO_MUXCFG, B_AX_BOOT_MODE);
+       rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST);
+}
+
 static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
 {
 #define PWR_ACT 1
@@ -1450,6 +1467,8 @@ static int rtw89_mac_power_switch(struct rtw89_dev *rtwdev, bool on)
        int ret;
        u8 val;
 
+       rtw89_mac_power_switch_boot_mode(rtwdev);
+
        if (on) {
                cfg_seq = chip->pwr_on_seq;
                cfg_func = chip->ops->pwr_on_func;
index 196700f0e3b20f98b904d514609f53c9aced7541..74b964e02159f0d48f1f23b927357bb458f87fc2 100644 (file)
 
 #define R_AX_SYS_STATUS1 0x00F4
 #define B_AX_SEL_0XC0_MASK GENMASK(17, 16)
+#define B_AX_AUTO_WLPON BIT(10)
 #define B_AX_PAD_HCI_SEL_V2_MASK GENMASK(5, 3)
 #define MAC_AX_HCI_SEL_SDIO_UART 0
 #define MAC_AX_HCI_SEL_MULTI_USB 1