re PR target/67032 (Geode optimizations incorrectly return -NaN)

	PR target/67032
	* config/i386/i386.c (geode_cost): Increase cost of MMX and SSE moves.

From-SVN: r233081

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fcdf48f67d53c6a92b1f2eab062c3302a096eb8f..3ed089bc2ed81b851c116e14b55cc34ccb0ee24b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2016-02-02  Uros Bizjak  <ubizjak@gmail.com>
+
+       PR target/67032
+       * config/i386/i386.c (geode_cost): Increase cost of MMX and SSE moves.
+
 2016-02-02  Alan Modra  <amodra@gmail.com>
 
        PR target/69548

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index bd1bfaacabba79df060471241aec4aca407d2f85..c20c32c4826a43ce0232199639bc07fa1e1dd10f 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -528,17 +528,17 @@ struct processor_costs geode_cost = {
   {4, 6, 6},                           /* cost of storing fp registers
                                           in SFmode, DFmode and XFmode */
 
-  1,                                   /* cost of moving MMX register */
-  {1, 1},                              /* cost of loading MMX registers
+  2,                                   /* cost of moving MMX register */
+  {2, 2},                              /* cost of loading MMX registers
                                           in SImode and DImode */
-  {1, 1},                              /* cost of storing MMX registers
+  {2, 2},                              /* cost of storing MMX registers
                                           in SImode and DImode */
-  1,                                   /* cost of moving SSE register */
-  {1, 1, 1},                           /* cost of loading SSE registers
+  2,                                   /* cost of moving SSE register */
+  {2, 2, 8},                           /* cost of loading SSE registers
                                           in SImode, DImode and TImode */
-  {1, 1, 1},                           /* cost of storing SSE registers
+  {2, 2, 8},                           /* cost of storing SSE registers
                                           in SImode, DImode and TImode */
-  1,                                   /* MMX or SSE register to integer */
+  3,                                   /* MMX or SSE register to integer */
   64,                                  /* size of l1 cache.  */
   128,                                 /* size of l2 cache.  */
   32,                                  /* size of prefetch block */