]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
EDAC/i10nm: Don't fail probing if ADXL is missing
authorVasily Khoruzhick <vasilykh@arista.com>
Tue, 14 Apr 2026 18:17:16 +0000 (11:17 -0700)
committerTony Luck <tony.luck@intel.com>
Thu, 14 May 2026 17:35:49 +0000 (10:35 -0700)
ADXL is not present in Coreboot- or Slimbootloader-based BIOSes and as
result, the driver fails to probe there.

Since commit 2738c69a8813 ("EDAC/i10nm: Add driver decoder for Ice Lake
and Tremont CPUs"), i10nm_edac supports driver decoder. Switch to driver
decoding when ADXL is not present.

Signed-off-by: Vasily Khoruzhick <vasilykh@arista.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Qiuxu Zhuo <qiuxu.zhuo@intel.com>
Cc: stable@vger.kernel.org # v6.1+
Link: https://patch.msgid.link/20260414181735.87023-1-anarsoul@gmail.com
drivers/edac/i10nm_base.c

index 63df35444214b95d597dcaa5d6b09345869caa5b..de6c52dbd9d25e06d69c8994d6607411c8779a52 100644 (file)
@@ -79,6 +79,7 @@ static struct res_config *res_cfg;
 static int retry_rd_err_log;
 static int decoding_via_mca;
 static bool mem_cfg_2lm;
+static bool no_adxl;
 
 static struct reg_rrl icx_reg_rrl_ddr = {
        .set_num = 2,
@@ -1222,8 +1223,14 @@ static int __init i10nm_init(void)
        }
 
        rc = skx_adxl_get();
-       if (rc)
-               goto fail;
+       if (rc) {
+               /* Decoding errors via MCA banks for 2LM isn't supported yet */
+               if (rc != -ENODEV || mem_cfg_2lm)
+                       goto fail;
+               i10nm_printk(KERN_INFO, "ADXL not found, falling back to MCA-based decoding.\n");
+               no_adxl = true;
+               decoding_via_mca = true;
+       }
 
        opstate_init();
        mce_register_decode_chain(&i10nm_mce_dec);
@@ -1257,7 +1264,8 @@ static void __exit i10nm_exit(void)
 
        skx_teardown_debug();
        mce_unregister_decode_chain(&i10nm_mce_dec);
-       skx_adxl_put();
+       if (!no_adxl)
+               skx_adxl_put();
        skx_remove();
 }