]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: cix: Add OrangePi 6 Plus board support
authorGary Yang <gary.yang@cixtech.com>
Sat, 10 Jan 2026 09:34:06 +0000 (17:34 +0800)
committerPeter Chen <peter.chen@cixtech.com>
Mon, 12 Jan 2026 01:11:19 +0000 (09:11 +0800)
OrangePi 6 Plus adopts CIX CD8180/CD8160 SoC, built-in 12-core 64-bit
processor + NPU processor,integrated graphics processor, equipped with
16GB/32GB/64GB LPDDR5, and provides two M.2 KEY-M interfaces 2280 for NVMe
SSD,as well as SPI FLASH and TF slots to meet the needs of fast read/write
and high-capacity storage

Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Link: https://lore.kernel.org/r/20260110093406.2700505-3-gary.yang@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
arch/arm64/boot/dts/cix/Makefile
arch/arm64/boot/dts/cix/sky1-xcp.dts [new file with mode: 0644]

index ed37139820128a9488e436478ad6a52b6c5c31b5..8a6c6fdc4ec00e34e639f759f4b55f4fdf01ddd5 100644 (file)
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
 dtb-$(CONFIG_ARCH_CIX) += sky1-orion-o6.dtb
+dtb-$(CONFIG_ARCH_CIX) += sky1-xcp.dtb
diff --git a/arch/arm64/boot/dts/cix/sky1-xcp.dts b/arch/arm64/boot/dts/cix/sky1-xcp.dts
new file mode 100644 (file)
index 0000000..1fae52d
--- /dev/null
@@ -0,0 +1,83 @@
+// SPDX-License-Identifier: BSD-3-Clause
+/*
+ * Copyright 2025 Cix Technology Group Co., Ltd.
+ *
+ */
+
+/dts-v1/;
+
+#include "sky1.dtsi"
+#include "sky1-pinfunc.h"
+
+/ {
+       model = "Xunlong,OrangePi 6 Plus";
+       compatible = "xunlong,orangepi-6-plus", "cix,sky1";
+
+       aliases {
+               serial2 = &uart2;
+       };
+
+       chosen {
+               stdout-path = &uart2;
+       };
+
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+               ranges;
+
+               linux,cma {
+                       compatible = "shared-dma-pool";
+                       reusable;
+                       size = <0x0 0x28000000>;
+                       linux,cma-default;
+               };
+       };
+
+};
+
+&iomuxc {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog>;
+
+       pinctrl_hog: hog-cfg {
+               pins {
+                       pinmux = <CIX_PAD_GPIO144_FUNC_GPIO144>,
+                               <CIX_PAD_GPIO145_FUNC_GPIO145>,
+                               <CIX_PAD_GPIO146_FUNC_GPIO146>,
+                               <CIX_PAD_GPIO147_FUNC_GPIO147>;
+                       bias-pull-down;
+                       drive-strength = <8>;
+               };
+       };
+};
+
+&iomuxc_s5 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_hog_s5>;
+
+       pinctrl_hog_s5: hog-s5-cfg {
+               pins {
+                       pinmux = <CIX_PAD_GPIO014_FUNC_GPIO014>;
+                       bias-pull-up;
+                       drive-strength = <8>;
+
+               };
+       };
+};
+
+&pcie_x8_rc {
+       status = "okay";
+};
+
+&pcie_x2_rc {
+       status = "okay";
+};
+
+&pcie_x1_1_rc {
+       status = "okay";
+};
+
+&uart2 {
+       status = "okay";
+};