RISC-V: Refine signed SAT_ADD testcase dump check to tree optimized

The sat alu related testcase check the rtl dump for the standard name
like .SAT_ADD exist or not.  But the rtl pass expand is somehow
impressionable by the middle-end change or debug information.  Like
below new appearance recently.

Replacing Expressions
_5 replace with --> _5 = .SAT_ADD (x_3(D), y_4(D)); [tail call]

After that we need to adjust the dump check time and again.  This
patch would like to switch to tree optimized pass for the standard
name check, which is more stable up to a point.

The below test suites are passed for this patch.
* The rv64gcv fully regression test.

It is test only patch and obvious up to a point, will commit it
directly if no comments in next 48H.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/sat/sat_s_add-1-i16.c: Take tree-optimized
	pass for standard name check, and adjust the times.
	* gcc.target/riscv/sat/sat_s_add-1-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-1-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-1-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-2-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-3-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i16.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i32.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i64.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add-4-i8.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-1-1.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-1.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-2-1.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-2.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-3-1.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-3.c: Ditto.
	* gcc.target/riscv/sat/sat_s_add_imm-4.c: Ditto.

Signed-off-by: Pan Li <pan2.li@intel.com>

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
index 24832c7435d9f28f28f4cbecf6c73ceb83095188..55890d8487ce95da5590275c120972b212c1dfee 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -29,4 +29,4 @@
 */
 DEF_SAT_S_ADD_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
index ea0a757cff8210e0df5c222e9252c950f720e980..29e843f3c7be13cbb4b81d44437925d5fa1708c7 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -28,4 +28,4 @@
 */
 DEF_SAT_S_ADD_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
index 85c0087d7d0d9ab0fc0b29a0d2db7ddc388579b0..7f29d21d1037f641209ccd12b102fc48f846e062 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -26,4 +26,4 @@
 */
 DEF_SAT_S_ADD_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
index 3941829543ed0df53d6c19f7bf568c97388331e1..3ad7bdd9164ea03760470637cd48de8d28e73559 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -27,4 +27,4 @@
 */
 DEF_SAT_S_ADD_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
index acbc50e5396e1dd2a856e0b175e4cf1cc355d5c5..07d31015c13227d75bf9f3fe2dc5a3f959bbcc89 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -29,4 +29,4 @@
 */
 DEF_SAT_S_ADD_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
index af22c34ca15ad2c3553c744b6be86558e8481154..81b85b4ab6ef4000ab3d3672c99fc80f33e9a988 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -28,4 +28,4 @@
 */
 DEF_SAT_S_ADD_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
index 2bb929385f2aa89d5659eda911b9e192c0eb149f..9a3d83e8edc87d444b054aac65520cf7d7046eaa 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -26,4 +26,4 @@
 */
 DEF_SAT_S_ADD_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
index 76f318b4ec1284770b3ba9b0844b5bf647a452cc..ecc9a0f733c4a48880f1e181420c22e8dd34dd2c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -27,4 +27,4 @@
 */
 DEF_SAT_S_ADD_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
index 2abeb033a2177ed74fb752a69c0bc5c86043a4ea..7e933856e717f66a6e03c43abf637b7038cec4cc 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -29,4 +29,4 @@
 */
 DEF_SAT_S_ADD_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
index e5c74e5f84bf01d3d28f9db8837219fdde80663c..09bf497cc10af6a784c41c782a1581b476230861 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -28,4 +28,4 @@
 */
 DEF_SAT_S_ADD_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
index 017efeda1db424cf7ee3c35cbc3c6d658c82d9ad..5652cdb9aea74a79e89974b2c292f953b33987da 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -26,4 +26,4 @@
 */
 DEF_SAT_S_ADD_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
index 8ced9e2592df884b0f0eacd5166e59d3bee8d2d6..0eb0c84964962f406462f47cc504403cff84a0bb 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -27,4 +27,4 @@
 */
 DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
index 5fdbd135d4b98f966b9b14774a67820a12a812cb..9dfdb9eba9af88919e42b30457f04e03d1c8c719 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -29,4 +29,4 @@
 */
 DEF_SAT_S_ADD_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
index 6fe98578f501f0c43a8a99ab874784c152a5dada..74df576b5319e25d9ffb504e7626d6a201f3310c 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -28,4 +28,4 @@
 */
 DEF_SAT_S_ADD_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
index dd4d3e801212240577a0076df9d1fccde3bc648b..5937699766f30ed2d266cd0e3966a921b8bb7bac 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -26,4 +26,4 @@
 */
 DEF_SAT_S_ADD_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
index eef05807a11230f5aa54b52db61e40ce2114fcb6..af850d0d15585bddc878f912534ba94a85dfd421 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -27,4 +27,4 @@
 */
 DEF_SAT_S_ADD_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-1.c
index a54bb94717dfc4be0317e535aa9ff2b178e9f262..84c6bc7da144e3fa9a03db1bef61dad386a66a8e 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-1.c
@@ -1,9 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
 DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, -129, INT8_MIN, INT8_MAX)
 DEF_SAT_S_ADD_IMM_FMT_1(1, int8_t, uint8_t, 128, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */
+/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1.c
index 154992b6a14fc88894bb50f115bc15dff4070e09..b6f1731352c981852cbecc4e425decba61c66e53 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -26,4 +26,4 @@
 */
 DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-1.c
index 960766f4383c67ac4c79818de65cb7f4e633088e..e9f708038c66bf8a07527ce2089a9aa03f0f3aee 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-1.c
@@ -1,9 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
 DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -32769, INT16_MIN, INT16_MAX)
 DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, 32768, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */
+/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2.c
index ebcfedd790a19b42467503c742b8f1d01a04b557..3878286d207be0b5479590d0f7189f6d00d43db8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -29,4 +29,4 @@
 */
 DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3-1.c
index 9a6254b773234d25ac42e48a377aa77bfff4a69b..9dae4254d3172b3e1374167b9252cbad5bd26aa8 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3-1.c
@@ -1,9 +1,9 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
 
 #include "sat_arith.h"
 
 DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, -2147483649, INT32_MIN, INT32_MAX)
 DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, 2147483648, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-not ".SAT_ADD " "expand" } } */
+/* { dg-final { scan-tree-dump-not ".SAT_ADD " "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3.c
index 371ba47295502f63fabf6ea469a05aa31e4439fc..c9fbc665562a78b42421963711f97b2ebba9a45f 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-3.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -27,4 +27,4 @@
 */
 DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */

diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-4.c
index 27320b550b2ab9c8390f2847df67b13d0e38ac2b..2aa954585e7673ee2e55563693b170208a555edf 100644 (file)
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-4.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-4.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-rtl-expand-details -fno-schedule-insns -fno-schedule-insns2" } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
 /* { dg-final { check-function-bodies "**" "" } } */
 
 #include "sat_arith.h"
@@ -25,4 +25,4 @@
 */
 DEF_SAT_S_ADD_IMM_FMT_1(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX)
 
-/* { dg-final { scan-rtl-dump-times ".SAT_ADD " 2 "expand" } } */
+/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */