drm/amd/pm: optimize logic and remove unnecessary checks in smu v15.0.8

the following two sets of logic are clearly mutually exclusive in
smu_v15_0_8_set_soft_freq_limited_range.
remove unnecessary code logic to keep the code logic clear.

e.g:

if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
	return -EINVAL;

if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
	...
}

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c
index 756cf4ac00faa7ac1b3b6a03eb6fd590180641ae..60a39c14f0e9408238eba2c9f256f8dde821e4c6 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu15/smu_v15_0_8_ppt.c
@@ -1911,42 +1911,36 @@ static int smu_v15_0_8_set_soft_freq_limited_range(struct smu_context *smu,
        if (smu_dpm->dpm_level != AMD_DPM_FORCED_LEVEL_MANUAL)
                return -EINVAL;
 
-       if (smu_dpm->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
-               if (min >= max) {
-                       dev_err(smu->adev->dev,
-                               "Minimum clk should be less than the maximum allowed clock\n");
-                       return -EINVAL;
-               }
+       if (min >= max) {
+               dev_err(smu->adev->dev,
+                       "Minimum clk should be less than the maximum allowed clock\n");
+               return -EINVAL;
+       }
 
-               if (clk_type == SMU_GFXCLK || clk_type == SMU_SCLK) {
-                       if ((min == pstate_table->gfxclk_pstate.curr.min) &&
-                           (max == pstate_table->gfxclk_pstate.curr.max))
-                               return 0;
+       if (clk_type == SMU_GFXCLK || clk_type == SMU_SCLK) {
+               if ((min == pstate_table->gfxclk_pstate.curr.min) &&
+                   (max == pstate_table->gfxclk_pstate.curr.max))
+                       return 0;
 
-                       ret = smu_v15_0_8_set_gfx_soft_freq_limited_range(smu,
-                                                                         min, max);
-                       if (!ret) {
-                               pstate_table->gfxclk_pstate.curr.min = min;
-                               pstate_table->gfxclk_pstate.curr.max = max;
-                       }
+               ret = smu_v15_0_8_set_gfx_soft_freq_limited_range(smu, min,
+                                                                 max);
+               if (!ret) {
+                       pstate_table->gfxclk_pstate.curr.min = min;
+                       pstate_table->gfxclk_pstate.curr.max = max;
                }
+       }
 
-               if (clk_type == SMU_UCLK) {
-                       if (max == pstate_table->uclk_pstate.curr.max)
-                               return 0;
-
-                       ret = smu_v15_0_set_soft_freq_limited_range(smu,
-                                                                   SMU_UCLK,
-                                                                   0, max,
-                                                                   false);
-                       if (!ret)
-                               pstate_table->uclk_pstate.curr.max = max;
-               }
+       if (clk_type == SMU_UCLK) {
+               if (max == pstate_table->uclk_pstate.curr.max)
+                       return 0;
 
-               return ret;
+               ret = smu_v15_0_set_soft_freq_limited_range(smu, SMU_UCLK, 0,
+                                                           max, false);
+               if (!ret)
+                       pstate_table->uclk_pstate.curr.max = max;
        }
 
-       return 0;
+       return ret;
 }
 
 static int smu_v15_0_8_od_edit_dpm_table(struct smu_context *smu,