re PR target/21416 (wrong code for __builtin_isless, __builtin_islessequal)

	PR target/21416
	* config/mips/mips.c (mips_emit_compare): Don't reverse UNGE and UNGT
	comparisons.
	* config/mips/mips.md (sungt_df, sunge_df, sungt_sf, sunge_sf): New
	patterns.

From-SVN: r99390

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8c8c3f2d3fb46e69fb4023cb987376ce4f9b9b84..63c1cc917ca7f52b14f2546a44fd41230fe53b77 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2005-05-08  Richard Sandiford  <rsandifo@redhat.com>
+
+       PR target/21416
+       * config/mips/mips.c (mips_emit_compare): Don't reverse UNGE and UNGT
+       comparisons.
+       * config/mips/mips.md (sungt_df, sunge_df, sungt_sf, sunge_sf): New
+       patterns.
+
 2005-05-08  Stephane Carrez  <stcarrez@nerim.fr>
 
        PR target/16925

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 037d1e5d7cb383027ef3207d1757937a0e695149..bb4359e49bf9e069fadbf82d306571d97605426a 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -3049,8 +3049,6 @@ get_float_compare_codes (enum rtx_code in_code, enum rtx_code *cmp_code,
   switch (in_code)
     {
     case NE:
-    case UNGE:
-    case UNGT:
     case LTGT:
     case ORDERED:
       *cmp_code = reverse_condition_maybe_unordered (in_code);

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index f054afc5aa253928d7a41ab5f4e714bca08b0fb1..35f89f0a1b43b0c1ebf75963345f8ecfa710dd05 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -7765,6 +7765,24 @@ srl\t%M0,%M1,%2\n\
   [(set_attr "type" "fcmp")
    (set_attr "mode" "FPSW")])
 
+(define_insn "sungt_df"
+  [(set (match_operand:CC 0 "register_operand" "=z")
+       (ungt:CC (match_operand:DF 1 "register_operand" "f")
+                (match_operand:DF 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
+  "c.ult.d\t%Z0%2,%1"
+  [(set_attr "type" "fcmp")
+   (set_attr "mode" "FPSW")])
+
+(define_insn "sunge_df"
+  [(set (match_operand:CC 0 "register_operand" "=z")
+       (unge:CC (match_operand:DF 1 "register_operand" "f")
+                (match_operand:DF 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT && TARGET_DOUBLE_FLOAT"
+  "c.ule.d\t%Z0%2,%1"
+  [(set_attr "type" "fcmp")
+   (set_attr "mode" "FPSW")])
+
 (define_insn "seq_df"
   [(set (match_operand:CC 0 "register_operand" "=z")
        (eq:CC (match_operand:DF 1 "register_operand" "f")
@@ -7846,6 +7864,24 @@ srl\t%M0,%M1,%2\n\
   [(set_attr "type" "fcmp")
    (set_attr "mode" "FPSW")])
 
+(define_insn "sungt_sf"
+  [(set (match_operand:CC 0 "register_operand" "=z")
+       (ungt:CC (match_operand:SF 1 "register_operand" "f")
+                (match_operand:SF 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT"
+  "c.ult.s\t%Z0%2,%1"
+  [(set_attr "type" "fcmp")
+   (set_attr "mode" "FPSW")])
+
+(define_insn "sunge_sf"
+  [(set (match_operand:CC 0 "register_operand" "=z")
+       (unge:CC (match_operand:SF 1 "register_operand" "f")
+                (match_operand:SF 2 "register_operand" "f")))]
+  "TARGET_HARD_FLOAT"
+  "c.ule.s\t%Z0%2,%1"
+  [(set_attr "type" "fcmp")
+   (set_attr "mode" "FPSW")])
+
 (define_insn "seq_sf"
   [(set (match_operand:CC 0 "register_operand" "=z")
        (eq:CC (match_operand:SF 1 "register_operand" "f")