]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: aspeed: anacapa: Add interrupt properties for PDB PCA9555
authorRex Fu <Rex.Fu@amd.com>
Fri, 17 Apr 2026 06:41:49 +0000 (14:41 +0800)
committerAndrew Jeffery <andrew@codeconstruct.com.au>
Mon, 18 May 2026 11:44:51 +0000 (21:14 +0930)
Add interrupt-parent and interrupts properties to the PDB PCA9555
nodes in the anacapa DTS.

[arj: Tweak commit subject capitalisation]

Signed-off-by: Rex Fu <Rex.Fu@amd.com>
Link: https://patch.msgid.link/20260417-anacapa-pca9555-irq-v1-1-9a6d28b1b656@amd.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts

index 9a43e0c87257ced8a29950785e05b01f03fea483..58d0651124e669f957b6e3a6b344fadd5eb147fc 100644 (file)
                                gpio-controller;
                                #gpio-cells = <2>;
 
+                               interrupt-parent = <&sgpiom0>;
+                               interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
+
                                gpio-line-names =
                                        "RPDB_FAN_FULL_SPEED_R_N", "RPDB_I2C_TEMP75_U8_ALERT_R_N",
                                        "RPDB_I2C_TMP432_U29_ALERT_R_N", "RPDB_GLOBAL_WP",
                                gpio-controller;
                                #gpio-cells = <2>;
 
+                               interrupt-parent = <&sgpiom0>;
+                               interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
+
                                gpio-line-names =
                                        "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R",
                                        "RPDB_PWRGD_P50V_HSC4_SYS_R",
                                gpio-controller;
                                #gpio-cells = <2>;
 
+                               interrupt-parent = <&sgpiom0>;
+                               interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
+
                                gpio-line-names =
                                        "LPDB_FAN_FULL_SPEED_R_N","LPDB_I2C_TEMP75_U8_ALERT_R_N",
                                        "LPDB_I2C_TMP432_U29_ALERT_R_N","LPDB_GLOBAL_WP",
                                gpio-controller;
                                #gpio-cells = <2>;
 
+                               interrupt-parent = <&sgpiom0>;
+                               interrupts = <174 IRQ_TYPE_LEVEL_LOW>;
+
                                gpio-line-names =
                                        "LPDB_P50V_FAN1_R2_PG","LPDB_P50V_FAN2_R2_PG",
                                        "LPDB_P50V_FAN3_R2_PG","LPDB_P50V_FAN4_R2_PG",