drm/i915/wm: Include ddb_y in skl_print_wm_changes() on pre-icl

Pre-icl doesn't use a separate hardware plane for Y scanout,
and instead it's all handled magically by the hardware. We
do still need to allocate DDB space for the Y color plane
though (PLANE_NV12_BUF_CFG). Include that information in the
debugs so that we know where it ended up.

On icl+ the equivalent information is dumped as the hardware
Y plane's normal ddb allocation.

v2: Use prink field width for ddb_name alignment

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260319114034.7093-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>

diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 6ad0546c928f633b87dc514f14217bcd93dda79b..e9cfbb7c9a77fb62952dd6c47292fe399172447b 100644 (file)
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2735,10 +2735,17 @@ skl_print_wm_changes(struct intel_atomic_state *state)
                        old = &old_crtc_state->wm.skl.plane_ddb[plane_id];
                        new = &new_crtc_state->wm.skl.plane_ddb[plane_id];
 
-                       if (skl_ddb_entry_equal(old, new))
+                       if (!skl_ddb_entry_equal(old, new))
+                               skl_print_plane_ddb_changes(plane, old, new, "ddb");
+
+                       if (DISPLAY_VER(display) >= 11)
                                continue;
 
-                       skl_print_plane_ddb_changes(plane, old, new, "ddb");
+                       old = &old_crtc_state->wm.skl.plane_ddb_y[plane_id];
+                       new = &new_crtc_state->wm.skl.plane_ddb_y[plane_id];
+
+                       if (!skl_ddb_entry_equal(old, new))
+                               skl_print_plane_ddb_changes(plane, old, new, "ddb_y");
                }
 
                for_each_intel_plane_on_crtc(display->drm, crtc, plane) {