return ret;
}
-static void cs42l43_gpio_set(struct gpio_chip *chip, unsigned int offset, int value)
+static int cs42l43_gpio_set(struct gpio_chip *chip, unsigned int offset,
+ int value)
{
struct cs42l43_pin *priv = gpiochip_get_data(chip);
unsigned int shift = offset + CS42L43_GPIO1_LVL_SHIFT;
offset + 1, str_high_low(value));
ret = pm_runtime_resume_and_get(priv->dev);
- if (ret) {
- dev_err(priv->dev, "Failed to resume for set: %d\n", ret);
- return;
- }
+ if (ret)
+ return ret;
ret = regmap_update_bits(priv->regmap, CS42L43_GPIO_CTRL1,
BIT(shift), value << shift);
if (ret)
- dev_err(priv->dev, "Failed to set gpio%d: %d\n", offset + 1, ret);
+ return ret;
pm_runtime_put(priv->dev);
+
+ return 0;
}
static int cs42l43_gpio_direction_out(struct gpio_chip *chip,
unsigned int offset, int value)
{
- cs42l43_gpio_set(chip, offset, value);
+ int ret;
+
+ ret = cs42l43_gpio_set(chip, offset, value);
+ if (ret)
+ return ret;
return pinctrl_gpio_direction_output(chip, offset);
}
priv->gpio_chip.direction_output = cs42l43_gpio_direction_out;
priv->gpio_chip.add_pin_ranges = cs42l43_gpio_add_pin_ranges;
priv->gpio_chip.get = cs42l43_gpio_get;
- priv->gpio_chip.set = cs42l43_gpio_set;
+ priv->gpio_chip.set_rv = cs42l43_gpio_set;
priv->gpio_chip.label = dev_name(priv->dev);
priv->gpio_chip.parent = priv->dev;
priv->gpio_chip.can_sleep = true;