mips.md (mips_get_fcsr, [...]): Use SI machine mode for unspec_volatile operand.

        * config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
        machine mode for unspec_volatile operand.

        * gcc.target/mips/get-fcsr-3.c: New test.

From-SVN: r274864

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cfc39d66abc4996d83558416ddc6b1b843596e50..44d83990d6d9619dc73ec9a0a153c0d77fec4358 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+
+       Backport from mainline
+       2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+
+       * config/mips/mips.md (mips_get_fcsr, *mips_get_fcsr): Use SI
+       machine mode for unspec_volatile operand.
+
 2019-08-23  Martin Liska  <mliska@suse.cz>
 
        PR ipa/91508

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 2ae1f7e0440b147d513cb5a6188d548d821d9f47..a9b0c86be07a9fb5bcacf5d396b10fe089c2c6b3 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -7588,7 +7588,7 @@
 ;; __builtin_mips_get_fcsr: move the FCSR into operand 0.
 (define_expand "mips_get_fcsr"
   [(set (match_operand:SI 0 "register_operand")
-       (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
+       (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
   "TARGET_HARD_FLOAT_ABI"
 {
   if (TARGET_MIPS16)
@@ -7600,7 +7600,7 @@
 
 (define_insn "*mips_get_fcsr"
   [(set (match_operand:SI 0 "register_operand" "=d")
-       (unspec_volatile [(const_int 0)] UNSPEC_GET_FCSR))]
+       (unspec_volatile:SI [(const_int 0)] UNSPEC_GET_FCSR))]
   "TARGET_HARD_FLOAT"
   "cfc1\t%0,$31")
 

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 8073e23f7382f826a614c97983ee46ada9b702cb..bf696ab1730f885370669b61bece3e03a1cf6b82 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2019-08-23  Mihailo Stojanovic  <mistojanovic@wavecomp.com>
+
+       * gcc.target/mips/get-fcsr-3.c: New test.
+
 2019-08-20  Eric Botcazou  <ebotcazou@adacore.com>
 
        * gcc.c-torture/execute/20190820-1.c: New test.

diff --git a/gcc/testsuite/gcc.target/mips/get-fcsr-3.c b/gcc/testsuite/gcc.target/mips/get-fcsr-3.c
new file mode 100644 (file)
index 0000000..7bb97b6
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/get-fcsr-3.c
@@ -0,0 +1,9 @@
+/* { dg-options "-mabi=64 -mhard-float" } */
+
+NOMIPS16 unsigned int
+foo (void)
+{
+  return __builtin_mips_get_fcsr () & 0x1;
+}
+
+/* { dg-final { scan-assembler "cfc1" } } */