re PR target/52294 ([ARM Thumb] generated asm code produces "branch out of range...

	PR target/52294
	* thumb2.md (thumb2_shiftsi3_short): Split register and
	immediate shifts.  For register shifts tie operands 0 and 1.
	(peephole2 for above): Check that register-controlled shifts
	have suitably tied operands.

From-SVN: r184454

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 54e4e590d3c2ad71b740ce18c61624d7c0431d4b..592b954c9bd02bbd9c79bc5b97f24fe4c18b060c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2012-02-21  Richard Earnshaw  <rearnsha@arm.com>
+
+       PR target/52294
+       * thumb2.md (thumb2_shiftsi3_short): Split register and
+       immediate shifts.  For register shifts tie operands 0 and 1.
+       (peephole2 for above): Check that register-controlled shifts
+       have suitably tied operands.
+
 2012-02-14  Bin Cheng  <bin.cheng@arm.com>
 
        Backport from mainline.

diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index 2a6f03d12c17e788a8136b06da1321edc55083c9..108362f89aa74aea16bbf4c873f574cfc7e4c8b2 100644 (file)
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -1108,6 +1108,7 @@
          (match_operand:SI 2 "low_reg_or_int_operand" "")]))]
   "TARGET_THUMB2
    && peep2_regno_dead_p(0, CC_REGNUM)
+   && (CONST_INT_P (operands[2]) || operands[1] == operands[0])
    && ((GET_CODE(operands[3]) != ROTATE && GET_CODE(operands[3]) != ROTATERT)
        || REG_P(operands[2]))"
   [(parallel
@@ -1120,10 +1121,10 @@
 )
 
 (define_insn "*thumb2_shiftsi3_short"
-  [(set (match_operand:SI   0 "low_register_operand" "=l")
+  [(set (match_operand:SI   0 "low_register_operand" "=l,l")
        (match_operator:SI  3 "shift_operator"
-        [(match_operand:SI 1 "low_register_operand"  "l")
-         (match_operand:SI 2 "low_reg_or_int_operand" "lM")]))
+        [(match_operand:SI 1 "low_register_operand"  "0,l")
+         (match_operand:SI 2 "low_reg_or_int_operand" "l,M")]))
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_THUMB2 && reload_completed
    && ((GET_CODE(operands[3]) != ROTATE && GET_CODE(operands[3]) != ROTATERT)