]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: rockchip: Add vdec node for RK3288
authorAlex Bee <knaerzche@gmail.com>
Fri, 5 Sep 2025 16:19:25 +0000 (16:19 +0000)
committerHeiko Stuebner <heiko@sntech.de>
Mon, 15 Dec 2025 11:21:05 +0000 (12:21 +0100)
RK3288 contains a Rockchip VDEC block that only support HEVC
decoding. Add a vdec node for this.

Signed-off-by: Alex Bee <knaerzche@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://patch.msgid.link/20250905161942.3759717-8-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm/boot/dts/rockchip/rk3288.dtsi

index 7477fc5da3ec999f5bcc70994296ade5752eae4e..4e5e7509de48765fb7c755af42eb57756bcdc413 100644 (file)
                power-domains = <&power RK3288_PD_VIDEO>;
        };
 
+       hevc: video-codec@ff9c0000 {
+               compatible = "rockchip,rk3288-vdec";
+               reg = <0x0 0xff9c0000 0x0 0x440>;
+               interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+                        <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+               clock-names = "axi", "ahb", "cabac", "core";
+               assigned-clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>,
+                                 <&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CORE>;
+               assigned-clock-rates = <400000000>, <100000000>,
+                                      <300000000>, <300000000>;
+               iommus = <&hevc_mmu>;
+               power-domains = <&power RK3288_PD_HEVC>;
+       };
+
        hevc_mmu: iommu@ff9c0440 {
                compatible = "rockchip,iommu";
                reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
                clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
                clock-names = "aclk", "iface";
                #iommu-cells = <0>;
-               status = "disabled";
+               power-domains = <&power RK3288_PD_HEVC>;
        };
 
        gpu: gpu@ffa30000 {