Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 247f649bebf37410305f99669196324211f79048..7c92bf6e291d4834ea26a63b50b2698eea6ea8ea 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,60 @@
+2026-01-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+       * configure: Regenerate.
+
+2026-01-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       * config/riscv/riscv.cc (riscv_conditional_register_usage): Revert
+       patch that made VXRM a global register.
+
+2026-01-04  Keith Packard  <keithp@keithp.com>
+
+       * config.gcc: Add clause for picolibc.
+       * config/picolibc-spec.h: New file.
+       * config/picolibc.opt: Likewise.
+       * config/picolibc.opt.urls: Likewise.
+       * configure.ac: Add support for --with-picolibc.
+       * configure: Rebuilt.
+       * doc/invoke.texi: Document picolibc options.
+       * doc/tm.texi.in (LIBC_CPP_SPEC): Document.
+       (LIBC_LINK_SPEC): Similarly.
+       * doc/tm.texi: Rebuilt.
+       * gcc.cc (LIBC_CPP_SPEC): Provide default definition.
+       (LIBC_LINK_SPEC): Likewise.
+       (cpp_spec): Include LIBC_CPP_SPEC.
+       (link_spec): Similarly for LIBC_LINK_SPEC.
+
+2026-01-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       * doc/contrib.texi: Add Kazumoto & Oleg.
+
+2026-01-04  Richard Braun  <rbraun@sceen.net>
+
+       * config/c6x/c6x-sched.md.in (mpydp_m_N__CROSS_,
+       mpyspdp_m_N__CROSS_, mpysp2dp_m_N__CROSS_): Update reservations.
+       * config/c6x/c6x-sched.md: Regenerated.
+       * config/c6x/c6x.md (m1dp, m1spdp, m2dp, m2spdp): New CPU units.
+
+2026-01-04  Kalvis Duckmanton  <kalvisd@gmail.com>
+
+       * config/host-netbsd.cc (netbsd_gt_pch_use_address): Support PCH
+       loading at addresses other than its preferred address.
+       * config/host-openbsd.cc (openbsd_gt_pch_use_address): Likewise.
+
+2026-01-04  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>
+
+       PR tree-optimization/122608
+       * match.pd (`(c ? a : b) op d -> c ? (a op d) : (b op d)`): New
+       pattern.
+       (`d op (c ? a : b) -> c ? (d op a) : (d op b)`): Likewise
+
+2026-01-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/123010
+       * simplify-rtx.cc (simplify_binary_operation_1, case ASHIFT): Simplify
+       case where a left shift of the sign extracted field can be turned into
+       a sign extension of a left shift.
+
 2026-01-03  Jakub Jelinek  <jakub@redhat.com>
 
        PR tree-optimization/123372

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 666a54d433ad0e0ad7a8645deaa5c6bd2b28c8bf..2a4d02b831b1b365663a206bed456146fc6eaa7e 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20260104
+20260105

diff --git a/gcc/algol68/ChangeLog b/gcc/algol68/ChangeLog
index 9d9cf72e3a66970a9fd37fbc3ecd8c30efc5a645..29f5b4893218001459176c44f8d6d5aba78d71c6 100644 (file)
--- a/gcc/algol68/ChangeLog
+++ b/gcc/algol68/ChangeLog
@@ -1,3 +1,7 @@
+2026-01-04  Jose E. Marchesi  <jose.marchesi@oracle.com>
+
+       * a68-lang.cc (a68_post_options): Disable psABI warnings.
+
 2025-12-31  Jose E. Marchesi  <jose.marchesi@oracle.com>
 
        * a68-exports.cc (a68_asm_output_mode): Do not rely on DIM to

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 710f1ec481e6e866d166be6f5ce61a9de44a42ec..d7939fe5ebf142cb073537b1662d8a903185f62e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,29 @@
+2026-01-04  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
+
+       PR testsuite/123377
+       * gcc.dg/uninit-pred-7_a.c: Add
+       `--param logical-op-non-short-circuit=1` to the options.
+       * gcc.dg/uninit-pred-7_a_a.c: New test.
+
+2026-01-04  Daniel Barboza  <daniel.barboza@oss.qualcomm.com>
+
+       PR tree-optimization/122608
+       * gcc.target/i386/pr110701.c: the pattern added is now folding
+       an XOR into the ifcond and the assembler isn't emitting an
+       'andl' anymore. The test was turned into a runtime test
+       instead.
+       * gcc.dg/torture/pr122608.c: New test.
+
+2026-01-04  Jeff Law  <jeffrey.law@oss.qualcomm.com>
+
+       PR target/123010
+       * gcc.target/riscv/pr123010.c: New test.
+
+2026-01-04  Dimitar Dimitrov  <dimitar@dinux.eu>
+
+       * gcc.dg/Wzero-as-null-pointer-constant-2.c: Require effective
+       target bitint.
+
 2026-01-03  Andrew Pinski  <andrew.pinski@oss.qualcomm.com>
 
        PR tree-optimization/42196