#define RFE_RD_FIFO_TH_3_DWORDS 0x3
+static bool pci11x1x_is_a0(struct lan743x_adapter *adapter)
+{
+ u32 dev_rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_;
+ return dev_rev == ID_REV_CHIP_REV_PCI11X1X_A0_;
+}
+
static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter)
{
u32 chip_rev;
cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG);
lan743x_hs_syslock_release(adapter);
hw_cfg = lan743x_csr_read(adapter, HW_CFG);
-
- if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ ||
- hw_cfg & HW_CFG_RST_PROTECT_) {
- strap = lan743x_csr_read(adapter, STRAP_READ);
+ strap = lan743x_csr_read(adapter, STRAP_READ);
+ if ((pci11x1x_is_a0(adapter) &&
+ (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ ||
+ hw_cfg & HW_CFG_RST_PROTECT_)) ||
+ (strap & STRAP_READ_USE_SGMII_EN_)) {
if (strap & STRAP_READ_SGMII_EN_)
adapter->is_sgmii_en = true;
else
#define ID_REV_CHIP_REV_MASK_ (0x0000FFFF)
#define ID_REV_CHIP_REV_A0_ (0x00000000)
#define ID_REV_CHIP_REV_B0_ (0x00000010)
+#define ID_REV_CHIP_REV_PCI11X1X_A0_ (0x000000A0)
#define ID_REV_CHIP_REV_PCI11X1X_B0_ (0x000000B0)
#define FPGA_REV (0x04)