Pull Renesas clk driver fixes from Geert Uytterhoeven:
- Fix ordering of module clocks arrays on Renesas RZ/V2H(P) and RZ/V2N
- Remove clocks for watchdogs meant for other CPU cores on the
Renesas RZ/V2H(P) SoC
* tag 'renesas-clk-fixes-for-v7.0-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a09g057: Remove entries for WDT{0,2,3}
clk: renesas: r9a09g056: Fix ordering of module clocks array
clk: renesas: r9a09g057: Fix ordering of module clocks array