x86/cpuid: Rename cpuid_get_leaf_0x2_regs() to cpuid_leaf_0x2()

Rename the CPUID(0x2) register accessor function:

    cpuid_get_leaf_0x2_regs(regs)

to:

    cpuid_leaf_0x2(regs)

for consistency with other <cpuid/api.h> accessors that return full CPUID
registers outputs like:

    cpuid_leaf(regs)
    cpuid_subleaf(regs)

In the same vein, rename the CPUID(0x2) iteration macro:

    for_each_leaf_0x2_entry()

to:

    for_each_cpuid_0x2_desc()

to include "cpuid" in the macro name, and since what is iterated upon is
CPUID(0x2) cache and TLB "descriptos", not "entries".  Prefix an
underscore to that iterator macro parameters, so that the newly renamed
'desc' parameter do not get mixed with "union leaf_0x2_regs :: desc[]" in
the macro's implementation.

Adjust all the affected call-sites accordingly.

While at it, use "CPUID(0x2)" instead of "CPUID leaf 0x2" as this is the
recommended style.

No change in functionality intended.

Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Andrew Cooper <andrew.cooper3@citrix.com>
Cc: John Ogness <john.ogness@linutronix.de>
Cc: x86-cpuid@lists.linux.dev
Link: https://lore.kernel.org/r/20250508150240.172915-6-darwi@linutronix.de

diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h
index c0211fcdc706afb86796746c246b767306007b8a..ccf20c62b89f542bb3cbc56bf0257ad0fcc303ba 100644 (file)
--- a/arch/x86/include/asm/cpuid/api.h
+++ b/arch/x86/include/asm/cpuid/api.h
@@ -216,17 +216,17 @@ static inline u32 hypervisor_cpuid_base(const char *sig, u32 leaves)
  */
 
 /**
- * cpuid_get_leaf_0x2_regs() - Return sanitized leaf 0x2 register output
+ * cpuid_leaf_0x2() - Return sanitized CPUID(0x2) register output
  * @regs:      Output parameter
  *
- * Query CPUID leaf 0x2 and store its output in @regs. Force set any
+ * Query CPUID(0x2) and store its output in @regs.  Force set any
  * invalid 1-byte descriptor returned by the hardware to zero (the NULL
  * cache/TLB descriptor) before returning it to the caller.
  *
- * Use for_each_leaf_0x2_entry() to iterate over the register output in
+ * Use for_each_cpuid_0x2_desc() to iterate over the register output in
  * parsed form.
  */
-static inline void cpuid_get_leaf_0x2_regs(union leaf_0x2_regs *regs)
+static inline void cpuid_leaf_0x2(union leaf_0x2_regs *regs)
 {
        cpuid_leaf(0x2, regs);
 
@@ -251,34 +251,34 @@ static inline void cpuid_get_leaf_0x2_regs(union leaf_0x2_regs *regs)
 }
 
 /**
- * for_each_leaf_0x2_entry() - Iterator for parsed leaf 0x2 descriptors
- * @regs:   Leaf 0x2 register output, returned by cpuid_get_leaf_0x2_regs()
- * @__ptr:  u8 pointer, for macro internal use only
- * @entry:  Pointer to parsed descriptor information at each iteration
+ * for_each_cpuid_0x2_desc() - Iterator for parsed CPUID(0x2) descriptors
+ * @_regs:     CPUID(0x2) register output, as returned by cpuid_leaf_0x2()
+ * @_ptr:      u8 pointer, for macro internal use only
+ * @_desc:     Pointer to the parsed CPUID(0x2) descriptor at each iteration
  *
- * Loop over the 1-byte descriptors in the passed leaf 0x2 output registers
- * @regs.  Provide the parsed information for each descriptor through @entry.
+ * Loop over the 1-byte descriptors in the passed CPUID(0x2) output registers
+ * @_regs.  Provide the parsed information for each descriptor through @_desc.
  *
- * To handle cache-specific descriptors, switch on @entry->c_type.  For TLB
- * descriptors, switch on @entry->t_type.
+ * To handle cache-specific descriptors, switch on @_desc->c_type.  For TLB
+ * descriptors, switch on @_desc->t_type.
  *
  * Example usage for cache descriptors::
  *
- *     const struct leaf_0x2_table *entry;
+ *     const struct leaf_0x2_table *desc;
  *     union leaf_0x2_regs regs;
  *     u8 *ptr;
  *
- *     cpuid_get_leaf_0x2_regs(&regs);
- *     for_each_leaf_0x2_entry(regs, ptr, entry) {
- *             switch (entry->c_type) {
+ *     cpuid_leaf_0x2(&regs);
+ *     for_each_cpuid_0x2_desc(regs, ptr, desc) {
+ *             switch (desc->c_type) {
  *                     ...
  *             }
  *     }
  */
-#define for_each_leaf_0x2_entry(regs, __ptr, entry)                            \
-       for (__ptr = &(regs).desc[1];                                           \
-            __ptr < &(regs).desc[16] && (entry = &cpuid_0x2_table[*__ptr]);    \
-            __ptr++)
+#define for_each_cpuid_0x2_desc(_regs, _ptr, _desc)                            \
+       for (_ptr = &(_regs).desc[1];                                           \
+            _ptr < &(_regs).desc[16] && (_desc = &cpuid_0x2_table[*_ptr]);     \
+            _ptr++)
 
 /*
  * CPUID(0x80000006) parsing:

diff --git a/arch/x86/kernel/cpu/cacheinfo.c b/arch/x86/kernel/cpu/cacheinfo.c
index 6d61f7dff9e7f2074235317ca17cdaad375d0039..b6349c1792dd56a146ebfb191aa1c93339ed209f 100644 (file)
--- a/arch/x86/kernel/cpu/cacheinfo.c
+++ b/arch/x86/kernel/cpu/cacheinfo.c
@@ -388,8 +388,8 @@ static void intel_cacheinfo_0x2(struct cpuinfo_x86 *c)
        if (c->cpuid_level < 2)
                return;
 
-       cpuid_get_leaf_0x2_regs(&regs);
-       for_each_leaf_0x2_entry(regs, ptr, entry) {
+       cpuid_leaf_0x2(&regs);
+       for_each_cpuid_0x2_desc(regs, ptr, entry) {
                switch (entry->c_type) {
                case CACHE_L1_INST:     l1i += entry->c_size; break;
                case CACHE_L1_DATA:     l1d += entry->c_size; break;

diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 7f8ca29c8ac482cc4118aee1ca513d8deef33484..f8141b5d3e30365100d477e59baaa4c961388ec9 100644 (file)
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -716,8 +716,8 @@ static void intel_detect_tlb(struct cpuinfo_x86 *c)
        if (c->cpuid_level < 2)
                return;
 
-       cpuid_get_leaf_0x2_regs(&regs);
-       for_each_leaf_0x2_entry(regs, ptr, entry)
+       cpuid_leaf_0x2(&regs);
+       for_each_cpuid_0x2_desc(regs, ptr, entry)
                intel_tlb_lookup(entry);
 }