]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: r8a779a0: Move interrupt-parent to root node
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Wed, 24 Sep 2025 04:31:15 +0000 (04:31 +0000)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 28 Oct 2025 08:23:44 +0000 (09:23 +0100)
Move the "interrupt-parent = <&gic>" property from the soc node to the
root node, and simplify "interrupts-extended = <&gic ...>" to
"interrupts = <...>".

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/87tt0s8oa4.wl-kuninori.morimoto.gx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r8a779a0.dtsi

index 2c3fb34abb28e7a2e9929838f90cb4464ee54a15..f48b0d5c19e833e47b26a9fecf94920c4f14da65 100644 (file)
@@ -13,6 +13,7 @@
        compatible = "renesas,r8a779a0";
        #address-cells = <2>;
        #size-cells = <2>;
+       interrupt-parent = <&gic>;
 
        /* External CAN clock - to be overridden by boards that provide it */
        can_clk: can {
@@ -60,7 +61,7 @@
 
        pmu_a76 {
                compatible = "arm,cortex-a76-pmu";
-               interrupts-extended = <&gic GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
+               interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
        };
 
        /* External SCIF clock - to be overridden by boards that provide it */
@@ -72,7 +73,6 @@
 
        soc: soc {
                compatible = "simple-bus";
-               interrupt-parent = <&gic>;
                bootph-all;
 
                #address-cells = <2>;
 
        timer {
                compatible = "arm,armv8-timer";
-               interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
-                                     <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
-                                     <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
-                                     <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
-                                     <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
+               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
+                            <GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
                interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
                                  "hyp-virt";
        };