]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: qcom: sc8280xp-crd: model the PMU of the on-board wcn6855
authorBartosz Golaszewski <bartosz.golaszewski@linaro.org>
Fri, 18 Oct 2024 12:49:13 +0000 (14:49 +0200)
committerBjorn Andersson <andersson@kernel.org>
Tue, 29 Oct 2024 20:12:27 +0000 (15:12 -0500)
Add nodes for the WCN6855 PMU, the WLAN module and relevant regulators
and pin functions to fully describe how the wifi is actually wired on
this platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Co-developed-by: Konrad Dybcio <konradybcio@kernel.org>
Signed-off-by: Konrad Dybcio <konradybcio@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Link: https://lore.kernel.org/r/20241018-sc8280xp-pwrseq-v6-3-8da8310d9564@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts

index 6020582b0a59d73514ea8fdba4f47d0c13d81316..a02d8029ac2d57caf04228ba23cb0b439399be77 100644 (file)
                        };
                };
        };
+
+       wcn6855-pmu {
+               compatible = "qcom,wcn6855-pmu";
+
+               pinctrl-0 = <&wlan_en>;
+               pinctrl-names = "default";
+
+               wlan-enable-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>;
+               swctrl-gpios = <&tlmm 132 GPIO_ACTIVE_HIGH>;
+
+               vddio-supply = <&vreg_s10b>;
+               vddaon-supply = <&vreg_s12b>;
+               vddpmu-supply = <&vreg_s12b>;
+               vddpmumx-supply = <&vreg_s12b>;
+               vddpmucx-supply = <&vreg_s12b>;
+               vddrfa0p95-supply = <&vreg_s12b>;
+               vddrfa1p3-supply = <&vreg_s11b>;
+               vddrfa1p9-supply = <&vreg_s1c>;
+               vddpcie1p3-supply = <&vreg_s11b>;
+               vddpcie1p9-supply = <&vreg_s1c>;
+
+               regulators {
+                       vreg_pmu_rfa_cmn_0p8: ldo0 {
+                               regulator-name = "vreg_pmu_rfa_cmn_0p8";
+                       };
+
+                       vreg_pmu_aon_0p8: ldo1 {
+                               regulator-name = "vreg_pmu_aon_0p8";
+                       };
+
+                       vreg_pmu_wlcx_0p8: ldo2 {
+                               regulator-name = "vreg_pmu_wlcx_0p8";
+                       };
+
+                       vreg_pmu_wlmx_0p8: ldo3 {
+                               regulator-name = "vreg_pmu_wlmx_0p8";
+                       };
+
+                       vreg_pmu_btcmx_0p8: ldo4 {
+                               regulator-name = "vreg_pmu_btcmx_0p8";
+                       };
+
+                       vreg_pmu_pcie_1p8: ldo5 {
+                               regulator-name = "vreg_pmu_pcie_1p8";
+                       };
+
+                       vreg_pmu_pcie_0p9: ldo6 {
+                               regulator-name = "vreg_pmu_pcie_0p9";
+                       };
+
+                       vreg_pmu_rfa_0p8: ldo7 {
+                               regulator-name = "vreg_pmu_rfa_0p8";
+                       };
+
+                       vreg_pmu_rfa_1p2: ldo8 {
+                               regulator-name = "vreg_pmu_rfa_1p2";
+                       };
+
+                       vreg_pmu_rfa_1p7: ldo9 {
+                               regulator-name = "vreg_pmu_rfa_1p7";
+                       };
+               };
+       };
 };
 
 &apps_rsc {
 
                vdd-l3-l5-supply = <&vreg_s11b>;
 
+               vreg_s10b: smps10 {
+                       regulator-name = "vreg_s10b";
+                       regulator-min-microvolt = <1800000>;
+                       regulator-max-microvolt = <1800000>;
+                       regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+                       regulator-always-on;
+                       regulator-boot-on;
+               };
+
                vreg_s11b: smps11 {
                        regulator-name = "vreg_s11b";
                        regulator-min-microvolt = <1272000>;
                        regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
                };
 
+               vreg_s12b: smps12 {
+                       regulator-name = "vreg_s12b";
+                       regulator-min-microvolt = <984000>;
+                       regulator-max-microvolt = <984000>;
+                       regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+               };
+
                vreg_l3b: ldo3 {
                        regulator-name = "vreg_l3b";
                        regulator-min-microvolt = <1200000>;
                compatible = "qcom,pm8350c-rpmh-regulators";
                qcom,pmic-id = "c";
 
+               vreg_s1c: smps1 {
+                       regulator-name = "vreg_s1c";
+                       regulator-min-microvolt = <1888000>;
+                       regulator-max-microvolt = <1888000>;
+                       regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
+               };
+
                vreg_l1c: ldo1 {
                        regulator-name = "vreg_l1c";
                        regulator-min-microvolt = <1800000>;
        status = "okay";
 };
 
+&pcie4_port0 {
+       wifi@0 {
+               compatible = "pci17cb,1103";
+               reg = <0x10000 0x0 0x0 0x0 0x0>;
+
+               vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
+               vddaon-supply = <&vreg_pmu_aon_0p8>;
+               vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
+               vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
+               vddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;
+               vddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;
+               vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
+               vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
+               vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
+
+               qcom,ath11k-calibration-variant = "QC_8280XP_CRD";
+       };
+};
+
 &pmc8280c_lpg {
        status = "okay";
 };
                        output-high;
                };
        };
+
+       wlan_en: wlan-en-state {
+               pins = "gpio134";
+               function = "gpio";
+               drive-strength = <16>;
+               bias-disable;
+       };
 };