Move pcie indirect access to register access block.
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
struct amdgpu_reg_access reg;
/* protects concurrent PCIE register access */
spinlock_t pcie_idx_lock;
- amdgpu_rreg_t pcie_rreg;
- amdgpu_wreg_t pcie_wreg;
amdgpu_rreg_ext_t pcie_rreg_ext;
amdgpu_wreg_ext_t pcie_wreg_ext;
amdgpu_rreg64_t pcie_rreg64;
#define REG_GET(FIELD, v) (((v) << FIELD##_SHIFT) & FIELD##_MASK)
#define RREG32_XCC(reg, inst) amdgpu_device_xcc_rreg(adev, (reg), 0, inst)
#define WREG32_XCC(reg, v, inst) amdgpu_device_xcc_wreg(adev, (reg), (v), 0, inst)
-#define RREG32_PCIE(reg) adev->pcie_rreg(adev, (reg))
-#define WREG32_PCIE(reg, v) adev->pcie_wreg(adev, (reg), (v))
+#define RREG32_PCIE(reg) amdgpu_reg_pcie_rd32(adev, (reg))
+#define WREG32_PCIE(reg, v) amdgpu_reg_pcie_wr32(adev, (reg), (v))
#define RREG32_PCIE_PORT(reg) amdgpu_reg_pciep_rd32(adev, (reg))
#define WREG32_PCIE_PORT(reg, v) amdgpu_reg_pciep_wr32(adev, (reg), (v))
#define RREG32_PCIE_EXT(reg) adev->pcie_rreg_ext(adev, (reg))
return adev->nbio.funcs->get_rev_id(adev);
}
-/**
- * amdgpu_invalid_rreg - dummy reg read function
- *
- * @adev: amdgpu_device pointer
- * @reg: offset of register
- *
- * Dummy register read function. Used for register blocks
- * that certain asics don't have (all asics).
- * Returns the value in the register.
- */
-static uint32_t amdgpu_invalid_rreg(struct amdgpu_device *adev, uint32_t reg)
-{
- dev_err(adev->dev, "Invalid callback to read register 0x%04X\n", reg);
- BUG();
- return 0;
-}
-
static uint32_t amdgpu_invalid_rreg_ext(struct amdgpu_device *adev, uint64_t reg)
{
dev_err(adev->dev, "Invalid callback to read register 0x%llX\n", reg);
return 0;
}
-/**
- * amdgpu_invalid_wreg - dummy reg write function
- *
- * @adev: amdgpu_device pointer
- * @reg: offset of register
- * @v: value to write to the register
- *
- * Dummy register read function. Used for register blocks
- * that certain asics don't have (all asics).
- */
-static void amdgpu_invalid_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
-{
- dev_err(adev->dev,
- "Invalid callback to write register 0x%04X with 0x%08X\n", reg,
- v);
- BUG();
-}
-
static void amdgpu_invalid_wreg_ext(struct amdgpu_device *adev, uint64_t reg, uint32_t v)
{
dev_err(adev->dev,
amdgpu_reg_access_init(adev);
- adev->pcie_rreg = &amdgpu_invalid_rreg;
- adev->pcie_wreg = &amdgpu_invalid_wreg;
adev->pcie_rreg_ext = &amdgpu_invalid_rreg_ext;
adev->pcie_wreg_ext = &amdgpu_invalid_wreg_ext;
adev->pcie_rreg64 = &amdgpu_invalid_rreg64;
adev->reg.audio_endpt.rreg = NULL;
adev->reg.audio_endpt.wreg = NULL;
+ adev->reg.pcie.rreg = NULL;
+ adev->reg.pcie.wreg = NULL;
adev->reg.pcie.port_rreg = NULL;
adev->reg.pcie.port_wreg = NULL;
}
adev->reg.audio_endpt.wreg(adev, block, reg, v);
}
+uint32_t amdgpu_reg_pcie_rd32(struct amdgpu_device *adev, uint32_t reg)
+{
+ if (!adev->reg.pcie.rreg) {
+ dev_err_once(adev->dev, "PCIE register read not supported\n");
+ return 0;
+ }
+ return adev->reg.pcie.rreg(adev, reg);
+}
+
+void amdgpu_reg_pcie_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v)
+{
+ if (!adev->reg.pcie.wreg) {
+ dev_err_once(adev->dev, "PCIE register write not supported\n");
+ return;
+ }
+ adev->reg.pcie.wreg(adev, reg, v);
+}
+
uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg)
{
if (!adev->reg.pcie.port_rreg) {
ret = readl(((void __iomem *)adev->rmmio) + (reg * 4));
}
} else {
- ret = adev->pcie_rreg(adev, reg * 4);
+ ret = amdgpu_reg_pcie_rd32(adev, reg * 4);
}
trace_amdgpu_device_rreg(adev->pdev->device, reg, ret);
ret = readl(((void __iomem *)adev->rmmio) + (reg * 4));
}
} else {
- ret = adev->pcie_rreg(adev, reg * 4);
+ ret = amdgpu_reg_pcie_rd32(adev, reg * 4);
}
return ret;
writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
}
} else {
- adev->pcie_wreg(adev, reg * 4, v);
+ amdgpu_reg_pcie_wr32(adev, reg * 4, v);
}
trace_amdgpu_device_wreg(adev->pdev->device, reg, v);
if (adev->gfx.rlc.funcs->is_rlcg_access_range(adev, reg))
return amdgpu_sriov_wreg(adev, reg, v, 0, 0, xcc_id);
} else if ((reg * 4) >= adev->rmmio_size) {
- adev->pcie_wreg(adev, reg * 4, v);
+ amdgpu_reg_pcie_wr32(adev, reg * 4, v);
} else {
writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
}
writel(v, ((void __iomem *)adev->rmmio) + (reg * 4));
}
} else {
- adev->pcie_wreg(adev, reg * 4, v);
+ amdgpu_reg_pcie_wr32(adev, reg * 4, v);
}
}
};
struct amdgpu_reg_pcie_ind {
+ amdgpu_rreg_t rreg;
+ amdgpu_wreg_t wreg;
amdgpu_rreg_t port_rreg;
amdgpu_wreg_t port_wreg;
};
uint32_t reg);
void amdgpu_reg_audio_endpt_wr32(struct amdgpu_device *adev, uint32_t block,
uint32_t reg, uint32_t v);
+uint32_t amdgpu_reg_pcie_rd32(struct amdgpu_device *adev, uint32_t reg);
+void amdgpu_reg_pcie_wr32(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
uint32_t amdgpu_reg_pciep_rd32(struct amdgpu_device *adev, uint32_t reg);
void amdgpu_reg_pciep_wr32(struct amdgpu_device *adev, uint32_t reg,
uint32_t v);
adev->reg.smc.rreg = cik_smc_rreg;
adev->reg.smc.wreg = cik_smc_wreg;
- adev->pcie_rreg = &cik_pcie_rreg;
- adev->pcie_wreg = &cik_pcie_wreg;
+ adev->reg.pcie.rreg = &cik_pcie_rreg;
+ adev->reg.pcie.wreg = &cik_pcie_wreg;
adev->reg.uvd_ctx.rreg = &cik_uvd_ctx_rreg;
adev->reg.uvd_ctx.wreg = &cik_uvd_ctx_wreg;
adev->reg.didt.rreg = &cik_didt_rreg;
struct amdgpu_device *adev = ip_block->adev;
adev->nbio.funcs->set_reg_remap(adev);
- adev->pcie_rreg = &amdgpu_device_indirect_rreg;
- adev->pcie_wreg = &amdgpu_device_indirect_wreg;
+ adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
+ adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
adev->reg.smc.rreg = si_smc_rreg;
adev->reg.smc.wreg = si_smc_wreg;
- adev->pcie_rreg = &si_pcie_rreg;
- adev->pcie_wreg = &si_pcie_wreg;
+ adev->reg.pcie.rreg = &si_pcie_rreg;
+ adev->reg.pcie.wreg = &si_pcie_wreg;
adev->reg.pcie.port_rreg = &si_pciep_rreg;
adev->reg.pcie.port_wreg = &si_pciep_wreg;
adev->reg.uvd_ctx.rreg = &si_uvd_ctx_rreg;
struct amdgpu_device *adev = ip_block->adev;
adev->nbio.funcs->set_reg_remap(adev);
- adev->pcie_rreg = &amdgpu_device_indirect_rreg;
- adev->pcie_wreg = &amdgpu_device_indirect_wreg;
+ adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
+ adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg_ext = &amdgpu_device_indirect_rreg_ext;
adev->pcie_wreg_ext = &amdgpu_device_indirect_wreg_ext;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
struct amdgpu_device *adev = ip_block->adev;
adev->nbio.funcs->set_reg_remap(adev);
- adev->pcie_rreg = &amdgpu_device_indirect_rreg;
- adev->pcie_wreg = &amdgpu_device_indirect_wreg;
+ adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
+ adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
struct amdgpu_device *adev = ip_block->adev;
adev->nbio.funcs->set_reg_remap(adev);
- adev->pcie_rreg = &amdgpu_device_indirect_rreg;
- adev->pcie_wreg = &amdgpu_device_indirect_wreg;
+ adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
+ adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->pcie_wreg64 = &amdgpu_device_indirect_wreg64;
adev->reg.pcie.port_rreg = &amdgpu_device_pcie_port_rreg;
{
struct amdgpu_device *adev = ip_block->adev;
- adev->pcie_rreg = &amdgpu_device_indirect_rreg;
- adev->pcie_wreg = &amdgpu_device_indirect_wreg;
+ adev->reg.pcie.rreg = &amdgpu_device_indirect_rreg;
+ adev->reg.pcie.wreg = &amdgpu_device_indirect_wreg;
adev->pcie_rreg_ext = &amdgpu_device_indirect_rreg_ext;
adev->pcie_wreg_ext = &amdgpu_device_indirect_wreg_ext;
adev->pcie_rreg64 = &amdgpu_device_indirect_rreg64;
adev->reg.smc.rreg = vi_smc_rreg;
adev->reg.smc.wreg = vi_smc_wreg;
}
- adev->pcie_rreg = &vi_pcie_rreg;
- adev->pcie_wreg = &vi_pcie_wreg;
+ adev->reg.pcie.rreg = &vi_pcie_rreg;
+ adev->reg.pcie.wreg = &vi_pcie_wreg;
adev->reg.uvd_ctx.rreg = &vi_uvd_ctx_rreg;
adev->reg.uvd_ctx.wreg = &vi_uvd_ctx_wreg;
adev->reg.didt.rreg = &vi_didt_rreg;
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