arm64: dts: rockchip: linewrap gmac assigned-clocks on Quartz64 Model A/B files a bit

Going over the 80-column width limit, and using all 100 columns, is intended
for improving code readability.  This wasn't the case in a few places in the
Quartz64 Model A/B board dts files, so let's reflow them a bit, to both obey
the 80-column limit and make them a bit more readable.

No intended functional changes are introduced by these changes.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/7eea4ebdb19d5f43d24074a166e6c46bb5424d46.1739218324.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
index 98e75df8b15823c5fdf594be771e81a1962ea305..3c127c5c2607a5f6e971f4fed6d9673a19f40bed 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts
@@ -265,8 +265,12 @@
 };
 
 &gmac1 {
-       assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
-       assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
+       assigned-clocks = <&cru SCLK_GMAC1_RX_TX>,
+                         <&cru SCLK_GMAC1_RGMII_SPEED>,
+                         <&cru SCLK_GMAC1>;
+       assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>,
+                                <&cru SCLK_GMAC1>,
+                                <&gmac1_clkin>;
        clock_in_out = "input";
        phy-supply = <&vcc_3v3>;
        phy-mode = "rgmii";

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
index 24928a129446e23c8fe8207c0ed8f0b366c09a1c..5707321a1144fcca99ba61f7764e0d47daa38bd6 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-b.dts
@@ -173,8 +173,12 @@
 };
 
 &gmac1 {
-       assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>;
-       assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>;
+       assigned-clocks = <&cru SCLK_GMAC1_RX_TX>,
+                         <&cru SCLK_GMAC1_RGMII_SPEED>,
+                         <&cru SCLK_GMAC1>;
+       assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>,
+                                <&cru SCLK_GMAC1>,
+                                <&gmac1_clkin>;
        clock_in_out = "input";
        phy-mode = "rgmii";
        phy-supply = <&vcc_3v3>;