iommupt: Fixup build warning by using BIT_ULL() for RISCVPT_NC/IO

Fix build warning on 32-bit configurations by using BIT_ULL() for
RISCVPT_NC and RISCVPT_IO.

Fixes: 6c21eb174c6c ("iommupt: Encode IOMMU_MMIO/IOMMU_CACHE via RISC-V Svpbmt bits")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202605121350.wZxB51k0-lkp@intel.com/
Signed-off-by: Fangyu Yu <fangyu.yu@linux.alibaba.com>
Reviewed-by: Jason Gunthorpe <jgg@nvidia.com>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>

diff --git a/drivers/iommu/generic_pt/fmt/riscv.h b/drivers/iommu/generic_pt/fmt/riscv.h
index 2648bb57953e3814c7368200605f648c3aac82c0..ae9a76514416c2ad817e458256e525ae635cb326 100644 (file)
--- a/drivers/iommu/generic_pt/fmt/riscv.h
+++ b/drivers/iommu/generic_pt/fmt/riscv.h
@@ -64,8 +64,8 @@ enum {
        RISCVPT_PPN64 = GENMASK_ULL(53, 10),
        RISCVPT_PPN64_64K = GENMASK_ULL(53, 14),
        RISCVPT_PBMT = GENMASK_ULL(62, 61),
-       RISCVPT_NC = BIT(61),
-       RISCVPT_IO = BIT(62),
+       RISCVPT_NC = BIT_ULL(61),
+       RISCVPT_IO = BIT_ULL(62),
        RISCVPT_N = BIT_ULL(63),
 
        /* Svnapot encodings for ppn[0] */