]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
dmaengine: at_xdmac: call at_xdmac_axi_config() on resume path
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Thu, 7 Oct 2021 11:12:27 +0000 (14:12 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 17 Nov 2021 10:04:35 +0000 (11:04 +0100)
[ Upstream commit fa5270ec2f2688d98a82895be7039b81c87d856c ]

at_xdmac could be used on SoCs which supports backup mode (where most
of the SoC power, including power to DMA controller, is closed at suspend
time). Thus, on resume, the settings which were previously done need to be
restored. Do the same for axi configuration.

Fixes: f40566f220a1 ("dmaengine: at_xdmac: add AXI priority support and recommended settings")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20211007111230.2331837-2-claudiu.beznea@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/dma/at_xdmac.c

index 64a52bf4d7377124b8108802289386e2d74731b8..855a59f3248ee6511302f955284f7df69f7de112 100644 (file)
@@ -1926,6 +1926,30 @@ static void at_xdmac_free_chan_resources(struct dma_chan *chan)
        return;
 }
 
+static void at_xdmac_axi_config(struct platform_device *pdev)
+{
+       struct at_xdmac *atxdmac = (struct at_xdmac *)platform_get_drvdata(pdev);
+       bool dev_m2m = false;
+       u32 dma_requests;
+
+       if (!atxdmac->layout->axi_config)
+               return; /* Not supported */
+
+       if (!of_property_read_u32(pdev->dev.of_node, "dma-requests",
+                                 &dma_requests)) {
+               dev_info(&pdev->dev, "controller in mem2mem mode.\n");
+               dev_m2m = true;
+       }
+
+       if (dev_m2m) {
+               at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_M2M);
+               at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_M2M);
+       } else {
+               at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_P2M);
+               at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_P2M);
+       }
+}
+
 #ifdef CONFIG_PM
 static int atmel_xdmac_prepare(struct device *dev)
 {
@@ -1975,6 +1999,7 @@ static int atmel_xdmac_resume(struct device *dev)
        struct at_xdmac         *atxdmac = dev_get_drvdata(dev);
        struct at_xdmac_chan    *atchan;
        struct dma_chan         *chan, *_chan;
+       struct platform_device  *pdev = container_of(dev, struct platform_device, dev);
        int                     i;
        int ret;
 
@@ -1982,6 +2007,8 @@ static int atmel_xdmac_resume(struct device *dev)
        if (ret)
                return ret;
 
+       at_xdmac_axi_config(pdev);
+
        /* Clear pending interrupts. */
        for (i = 0; i < atxdmac->dma.chancnt; i++) {
                atchan = &atxdmac->chan[i];
@@ -2007,30 +2034,6 @@ static int atmel_xdmac_resume(struct device *dev)
 }
 #endif /* CONFIG_PM_SLEEP */
 
-static void at_xdmac_axi_config(struct platform_device *pdev)
-{
-       struct at_xdmac *atxdmac = (struct at_xdmac *)platform_get_drvdata(pdev);
-       bool dev_m2m = false;
-       u32 dma_requests;
-
-       if (!atxdmac->layout->axi_config)
-               return; /* Not supported */
-
-       if (!of_property_read_u32(pdev->dev.of_node, "dma-requests",
-                                 &dma_requests)) {
-               dev_info(&pdev->dev, "controller in mem2mem mode.\n");
-               dev_m2m = true;
-       }
-
-       if (dev_m2m) {
-               at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_M2M);
-               at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_M2M);
-       } else {
-               at_xdmac_write(atxdmac, AT_XDMAC_GCFG, AT_XDMAC_GCFG_P2M);
-               at_xdmac_write(atxdmac, AT_XDMAC_GWAC, AT_XDMAC_GWAC_P2M);
-       }
-}
-
 static int at_xdmac_probe(struct platform_device *pdev)
 {
        struct at_xdmac *atxdmac;