Xe3p has HW ability to do transient display flush so the xe driver can
enable this HW feature by default and skip the software TD flush.
Bspec: 60002
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Shekhar Chauhan <shekhar.chauhan@intel.com>
Link: https://patch.msgid.link/20260305121902.1892593-10-tejas.upadhyay@intel.com
Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
{
struct xe_gt *root_gt;
+ /*
+ * From Xe3p onward the HW takes care of flush of TD entries also along
+ * with flushing XA entries, which will be at the usual sync points,
+ * like at the end of submission, so no manual flush is needed here.
+ */
+ if (GRAPHICS_VER(xe) >= 35)
+ return;
+
if (!IS_DGFX(xe) || GRAPHICS_VER(xe) < 20)
return;