# ifdef __CHERI_PURE_CAPABILITY__
_dl_main_map.l_map_start = auxv_values[AT_CHERI_EXEC_RX_CAP];
+ _dl_main_map.l_map_start = __builtin_cheri_perms_and (_dl_main_map.l_map_start, CAP_PERM_MASK_RX);
_dl_main_map.l_rw_start = auxv_values[AT_CHERI_EXEC_RW_CAP];
+ _dl_main_map.l_rw_start = __builtin_cheri_perms_and (_dl_main_map.l_rw_start, CAP_PERM_MASK_RW);
# endif
}
#endif
{
case AT_CHERI_EXEC_RX_CAP:
main_map->l_map_start = av->a_un.a_val;
+ main_map->l_map_start = __builtin_cheri_perms_and (main_map->l_map_start, CAP_PERM_MASK_RX);
break;
case AT_CHERI_EXEC_RW_CAP:
main_map->l_rw_start = av->a_un.a_val;
+ main_map->l_rw_start = __builtin_cheri_perms_and (main_map->l_rw_start, CAP_PERM_MASK_RW);
break;
}
#endif
cap_rw = cap_exe_rw;
ldso_base = cap_rx; /* Assume load segments start at vaddr 0. */
}
+ cap_rx = __builtin_cheri_perms_and (cap_rx, CAP_PERM_MASK_RX);
+ cap_rw = __builtin_cheri_perms_and (cap_rw, CAP_PERM_MASK_RW);
map->l_addr = ldso_base;
map->l_map_start = cap_rx;
map->l_rw_start = cap_rw;
return;
case AT_CHERI_EXEC_RX_CAP:
*cap_rx = auxv[1];
+ *cap_rx = __builtin_cheri_perms_and (*cap_rx, CAP_PERM_MASK_RX);
break;
case AT_CHERI_EXEC_RW_CAP:
*cap_rw = auxv[1];
+ *cap_rw = __builtin_cheri_perms_and (*cap_rw, CAP_PERM_MASK_RW);
break;
}
auxv += 2;