]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: rtw89: 8851b: Modify rtw8851b_pwr_{on,off}_func() for USB
authorBitterblue Smith <rtl8821cerfe2@gmail.com>
Mon, 30 Jun 2025 20:45:32 +0000 (23:45 +0300)
committerPing-Ke Shih <pkshih@realtek.com>
Fri, 4 Jul 2025 02:45:25 +0000 (10:45 +0800)
There are a few differences in the power on/off functions between PCIE
and USB.

While the RTL8851BU appears to work without these changes, it's
probably best to implement them, in case they are needed in some
situations.

Signed-off-by: Bitterblue Smith <rtl8821cerfe2@gmail.com>
Acked-by: Ping-Ke Shih <pkshih@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/469f6882-1859-464d-8a84-9ef1b6c8ce3e@gmail.com
drivers/net/wireless/realtek/rtw89/reg.h
drivers/net/wireless/realtek/rtw89/rtw8851b.c

index 90625d692b4dd0a763bb7078a246abc5b79b4591..196700f0e3b20f98b904d514609f53c9aced7541 100644 (file)
@@ -21,6 +21,7 @@
 #define R_AX_SYS_PW_CTRL 0x0004
 #define B_AX_SOP_ASWRM BIT(31)
 #define B_AX_SOP_PWMM_DSWR BIT(29)
+#define B_AX_SOP_EDSWR BIT(28)
 #define B_AX_XTAL_OFF_A_DIE BIT(22)
 #define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(18)
 #define B_AX_RDY_SYSPWR BIT(17)
index ad41c8bf39fcc9fc57324d37d669998722fe0aab..96edaf8e9ec4a439feb3d1c007d1d417d75ceb05 100644 (file)
@@ -385,7 +385,8 @@ static int rtw8851b_pwr_on_func(struct rtw89_dev *rtwdev)
        rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN);
 
        rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN);
-       rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1);
+       if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE)
+               rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1);
 
        ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_WEI,
                                      XTAL_SI_OFF_WEI);
@@ -430,8 +431,9 @@ static int rtw8851b_pwr_on_func(struct rtw89_dev *rtwdev)
 
        rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14);
        rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK);
-       rtw89_write32_set(rtwdev, R_AX_GPIO0_16_EECS_EESK_LED1_PULL_LOW_EN,
-                         B_AX_GPIO10_PULL_LOW_EN | B_AX_GPIO16_PULL_LOW_EN_V1);
+       if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE)
+               rtw89_write32_set(rtwdev, R_AX_GPIO0_16_EECS_EESK_LED1_PULL_LOW_EN,
+                                 B_AX_GPIO10_PULL_LOW_EN | B_AX_GPIO16_PULL_LOW_EN_V1);
 
        if (rtwdev->hal.cv == CHIP_CAV) {
                ret = rtw89_read_efuse_ver(rtwdev, &val8);
@@ -515,7 +517,10 @@ static int rtw8851b_pwr_off_func(struct rtw89_dev *rtwdev)
        if (ret)
                return ret;
 
-       rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION);
+       if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE)
+               rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION);
+       else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB)
+               rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_SOP_EDSWR);
 
        if (rtwdev->hal.cv == CHIP_CAV) {
                rtw8851b_patch_swr_pfm2pwm(rtwdev);
@@ -524,7 +529,14 @@ static int rtw8851b_pwr_off_func(struct rtw89_dev *rtwdev)
                rtw89_write32_set(rtwdev, R_AX_SPSANA_ON_CTRL1, B_AX_FPWMDELAY);
        }
 
-       rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS);
+       if (rtwdev->hci.type == RTW89_HCI_TYPE_PCIE) {
+               rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS);
+       } else if (rtwdev->hci.type == RTW89_HCI_TYPE_USB) {
+               val32 = rtw89_read32(rtwdev, R_AX_SYS_PW_CTRL);
+               val32 &= ~B_AX_AFSM_PCIE_SUS_EN;
+               val32 |= B_AX_AFSM_WLSUS_EN;
+               rtw89_write32(rtwdev, R_AX_SYS_PW_CTRL, val32);
+       }
 
        return 0;
 }