The problem here is the aarch64 backend enables -mearly-ra at -O2 and above but
it is not marked as an Optimization in the .opt file so enabling it sometimes
reset the target options when going from -O1 to -O2 for the first time.
Build and tested for aarch64-linux-gnu with no regressions.
PR target/116065
gcc/ChangeLog:
* config/aarch64/aarch64.opt (mearly-ra=): Mark as Optimization rather
than Save.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/target_optimization-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Enum(early_ra_scope) String(none) Value(AARCH64_EARLY_RA_NONE)
mearly-ra=
-Target RejectNegative Joined Enum(early_ra_scope) Var(aarch64_early_ra) Init(AARCH64_EARLY_RA_NONE) Save
+Target RejectNegative Joined Enum(early_ra_scope) Var(aarch64_early_ra) Init(AARCH64_EARLY_RA_NONE) Optimization
Specify when to enable an early register allocation pass. The possibilities
are: all functions, functions that have access to strided multi-register
instructions, and no functions.
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+#include <arm_sve.h>
+
+/* Turn off SVE overall */
+#pragma GCC target("+nosve")
+
+/* But the function turns it on again so it should work.
+ Even if changing the optimization level from O1 to O2. */
+int __attribute__((target ("+sve"), optimize(2)))
+bar (void)
+{
+ svfloat32_t xseg;
+ return svlen_f32(xseg);
+}