drm/panthor: Expose the selected coherency protocol to the UMD

If we want to be able to skip CPU cache maintenance operations on
CPU-cached mappings, the UMD needs to know the kind of coherency
in place. Add a field to drm_panthor_gpu_info to do that. We can re-use
a padding field for that since this object is write-only from the
KMD perspective, and the UMD should just ignore it.

v2:
- New commit

v3:
- Make coherency protocol a real enum, not a bitmask
- Add BUILD_BUG_ON()s to make sure the values in panthor_regs.h and
  those exposed through the uAPI match

v4:
- Add Steve's R-b

v5:
- No changes

v6:
- No changes

v7:
- Fix kernel doc

v8:
- No changes

Reviewed-by: Steven Price <steven.price@arm.com>
Reviewed-by: Karunika Choo <karunika.choo@arm.com>
Link: https://patch.msgid.link/20251208100841.730527-4-boris.brezillon@collabora.com
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>

diff --git a/drivers/gpu/drm/panthor/panthor_device.c b/drivers/gpu/drm/panthor/panthor_device.c
index 2979ee0e52c28d99aee0f656e66f6c17ed4a028c..54fbb1aa07c52ea614015615f304b5383d52fb0b 100644 (file)
--- a/drivers/gpu/drm/panthor/panthor_device.c
+++ b/drivers/gpu/drm/panthor/panthor_device.c
@@ -28,6 +28,12 @@
 
 static int panthor_gpu_coherency_init(struct panthor_device *ptdev)
 {
+       BUILD_BUG_ON(GPU_COHERENCY_NONE != DRM_PANTHOR_GPU_COHERENCY_NONE);
+       BUILD_BUG_ON(GPU_COHERENCY_ACE_LITE != DRM_PANTHOR_GPU_COHERENCY_ACE_LITE);
+       BUILD_BUG_ON(GPU_COHERENCY_ACE != DRM_PANTHOR_GPU_COHERENCY_ACE);
+
+       /* Start with no coherency, and update it if the device is flagged coherent. */
+       ptdev->gpu_info.selected_coherency = GPU_COHERENCY_NONE;
        ptdev->coherent = device_get_dma_attr(ptdev->base.dev) == DEV_DMA_COHERENT;
 
        if (!ptdev->coherent)
@@ -37,8 +43,10 @@ static int panthor_gpu_coherency_init(struct panthor_device *ptdev)
         * ACE protocol has never been supported for command stream frontend GPUs.
         */
        if ((gpu_read(ptdev, GPU_COHERENCY_FEATURES) &
-                     GPU_COHERENCY_PROT_BIT(ACE_LITE)))
+                     GPU_COHERENCY_PROT_BIT(ACE_LITE))) {
+               ptdev->gpu_info.selected_coherency = GPU_COHERENCY_ACE_LITE;
                return 0;
+       }
 
        drm_err(&ptdev->base, "Coherency not supported by the device");
        return -ENOTSUPP;

diff --git a/drivers/gpu/drm/panthor/panthor_gpu.c b/drivers/gpu/drm/panthor/panthor_gpu.c
index ff5231269518ef0cf115e3e88c2713217b094dc9..057e167468d03fa4268bbbee3a52e3240a629a55 100644 (file)
--- a/drivers/gpu/drm/panthor/panthor_gpu.c
+++ b/drivers/gpu/drm/panthor/panthor_gpu.c
@@ -51,7 +51,7 @@ struct panthor_gpu {
 static void panthor_gpu_coherency_set(struct panthor_device *ptdev)
 {
        gpu_write(ptdev, GPU_COHERENCY_PROTOCOL,
-                 ptdev->coherent ? GPU_COHERENCY_ACE_LITE : GPU_COHERENCY_NONE);
+                 ptdev->gpu_info.selected_coherency);
 }
 
 static void panthor_gpu_l2_config_set(struct panthor_device *ptdev)

diff --git a/include/uapi/drm/panthor_drm.h b/include/uapi/drm/panthor_drm.h
index 467d365ed7ba77051078c2470fa126bbab6606b2..28cf9e878db6614bfb382513b16a29bdf1cc08c2 100644 (file)
--- a/include/uapi/drm/panthor_drm.h
+++ b/include/uapi/drm/panthor_drm.h
@@ -245,6 +245,26 @@ enum drm_panthor_dev_query_type {
        DRM_PANTHOR_DEV_QUERY_GROUP_PRIORITIES_INFO,
 };
 
+/**
+ * enum drm_panthor_gpu_coherency: Type of GPU coherency
+ */
+enum drm_panthor_gpu_coherency {
+       /**
+        * @DRM_PANTHOR_GPU_COHERENCY_ACE_LITE: ACE Lite coherency.
+        */
+       DRM_PANTHOR_GPU_COHERENCY_ACE_LITE = 0,
+
+       /**
+        * @DRM_PANTHOR_GPU_COHERENCY_ACE: ACE coherency.
+        */
+       DRM_PANTHOR_GPU_COHERENCY_ACE = 1,
+
+       /**
+        * @DRM_PANTHOR_GPU_COHERENCY_NONE: No coherency.
+        */
+       DRM_PANTHOR_GPU_COHERENCY_NONE = 31,
+};
+
 /**
  * struct drm_panthor_gpu_info - GPU information
  *
@@ -301,7 +321,16 @@ struct drm_panthor_gpu_info {
         */
        __u32 thread_max_barrier_size;
 
-       /** @coherency_features: Coherency features. */
+       /**
+        * @coherency_features: Coherency features.
+        *
+        * Combination of drm_panthor_gpu_coherency flags.
+        *
+        * Note that this is just what the coherency protocols supported by the
+        * GPU, but the actual coherency in place depends on the SoC
+        * integration and is reflected by
+        * drm_panthor_gpu_info::selected_coherency.
+        */
        __u32 coherency_features;
 
        /** @texture_features: Texture features. */
@@ -310,8 +339,12 @@ struct drm_panthor_gpu_info {
        /** @as_present: Bitmask encoding the number of address-space exposed by the MMU. */
        __u32 as_present;
 
-       /** @pad0: MBZ. */
-       __u32 pad0;
+       /**
+        * @select_coherency: Coherency selected for this device.
+        *
+        * One of drm_panthor_gpu_coherency.
+        */
+       __u32 selected_coherency;
 
        /** @shader_present: Bitmask encoding the shader cores exposed by the GPU. */
        __u64 shader_present;