]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
pinctrl: sunxi: a523: Remove unneeded IRQ remuxing flag
authorAndre Przywara <andre.przywara@arm.com>
Fri, 27 Mar 2026 11:30:04 +0000 (11:30 +0000)
committerLinus Walleij <linusw@kernel.org>
Thu, 11 Jun 2026 11:47:52 +0000 (13:47 +0200)
The Allwinner A10 and H3 SoCs cannot read the state of a GPIO line when
that line is muxed for IRQ triggering (muxval 6), but only if it's
explicitly muxed for GPIO input (muxval 0). Other SoCs do not show this
behaviour, so we added a optional workaround, triggered by a quirk bit,
which triggers remuxing the pin when it's configured for IRQ, while we
need to read its value.

For some reasons this quirk flag was copied over to newer SoCs, even
though they don't show this behaviour, and the GPIO data register
reflects the true GPIO state even with a pin muxed to IRQ trigger.

Remove the unneeded quirk from the A523 family, where it's definitely
not needed (confirmed by experiments), and where it actually breaks,
because the workaround is not compatible with the newer generation
pinctrl IP used in that chip.

Together with a DT change this fixes GPIO IRQ operation on the A523
family of SoCs, as for instance used for the SD card detection.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Fixes: b8a51e95b376 ("pinctrl: sunxi: Add support for the secondary A523 GPIO ports")
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Acked-by: Chen-Yu Tsai <wens@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c

index 69cd2b4ebd7d7576fb6cff875e43c1b036167918..462aa1c4a5fa65e3ce448b9b0b8f92803215a62a 100644 (file)
@@ -26,7 +26,6 @@ static const u8 a523_r_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =
 static struct sunxi_pinctrl_desc a523_r_pinctrl_data = {
        .irq_banks = ARRAY_SIZE(a523_r_irq_bank_map),
        .irq_bank_map = a523_r_irq_bank_map,
-       .irq_read_needs_mux = true,
        .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
        .pin_base = PL_BASE,
 };
index 7d2308c37d29e6fed1f1833d8b3c0b079192d2d4..b6f78f1f30ac4a06cb61386d7741a64e0c893336 100644 (file)
@@ -26,7 +26,6 @@ static const u8 a523_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] =
 static struct sunxi_pinctrl_desc a523_pinctrl_data = {
        .irq_banks = ARRAY_SIZE(a523_irq_bank_map),
        .irq_bank_map = a523_irq_bank_map,
-       .irq_read_needs_mux = true,
        .io_bias_cfg_variant = BIAS_VOLTAGE_PIO_POW_MODE_SEL,
 };