]> git.ipfire.org Git - thirdparty/glibc.git/commitdiff
powerpc: Fix operand prefixes
authorGabriel F. T. Gomes <gftg@linux.vnet.ibm.com>
Tue, 12 Apr 2016 16:11:29 +0000 (13:11 -0300)
committerGabriel F. T. Gomes <gftg@linux.vnet.ibm.com>
Wed, 4 May 2016 12:14:52 +0000 (09:14 -0300)
The file sysdeps/powerpc/sysdeps.h defines aliases for condition register
operands.  E.g.: 'cr7' means condition register 7.  On the one hand, this
increases readability, as it makes it easier for readers to know whether the
operand is a condition register, a general purpose register or an immediate.
On the other hand, this permits that condition registers be written as if they
were general purpose, and vice-versa, thus reducing the readability of the
code.

This commit removes some of these unintentional misuses.

The changes have no effect on the final code.  Checked with objdump.

ChangeLog
sysdeps/powerpc/powerpc64/power8/strncpy.S

index d5f56c9c9bf8657483652efc880e789eddd67710..8fcb047815f5887cdb82a8f3c2870ee1c10cebfd 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,9 @@
+2016-05-04  Gabriel F. T. Gomes  <gftg@linux.vnet.ibm.com>
+
+       * sysdeps/powerpc/powerpc64/power8/strncpy.S: Fix use of condition
+       registers specifiers where general purpose registers specifiers should
+       have been used.
+
 2016-05-04  Florian Weimer  <fweimer@redhat.com>
 
        [BZ #19779]
index 0bb3bd46d71c187e374ea18992e55c908a1b5fee..437edeb7159140245fc1576191a5c00f780271c6 100644 (file)
@@ -294,7 +294,7 @@ L(pagecross):
 #endif
        orc     r9,r7,r9        /* Mask bits that are not part of the
                                   string.  */
-       li      cr7,0
+       li      r7,0
        cmpb    r9,r9,r7        /* Check for null bytes in DWORD1.  */
        cmpdi   cr7,r9,0
        bne     cr7,L(short_path_prepare_2)
@@ -305,14 +305,14 @@ L(pagecross):
        /* For next checks we have aligned address, so we check for more
           three doublewords to make sure we can read 16 unaligned bytes
           to start the bulk copy with 16 aligned addresses.  */
-       ld      cr7,8(r11)
+       ld      r7,8(r11)
        cmpb    r9,r7,r9
        cmpdi   cr7,r9,0
        bne     cr7,L(short_path_prepare_2)
-       addi    cr7,r8,-8
+       addi    r7,r8,-8
        cmpldi  cr7,r7,8
        ble     cr7,L(short_path_prepare_2)
-       ld      cr7,16(r11)
+       ld      r7,16(r11)
        cmpb    r9,r7,r9
        cmpdi   cr7,r9,0
        bne     cr7,L(short_path_prepare_2)