drm/i915/psr: Block DC states on vblank enable when Panel Replay supported

Currently we are blocking DC states only when Panel Replay is enabled on
vblank enable. It may happen that Panel Replay is getting enabled when
vblank is already enabled. Fix this by blocking DC states always if Panel
Replay is supported.

While at it take care of possible dual eDP case by looping all encoders
supporting PSR.

Fixes: 0c427ac78a1d ("drm/i915/psr: Add interface to notify PSR of vblank enable/disable")
Cc: <stable@vger.kernel.org> # v6.16+
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Link: https://patch.msgid.link/20260520104944.239797-1-jouni.hogander@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b0414bd1dc6b18f5b29b03c2955d85ae82da54c3..70108e0a4c0c050d2eea72e4e91210311fac99f3 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -4180,32 +4180,33 @@ void intel_psr_notify_vblank_enable_disable(struct intel_display *display,
                                            bool enable)
 {
        struct intel_encoder *encoder;
+       bool block_dc_states = false;
 
        for_each_intel_encoder_with_psr(display->drm, encoder) {
                struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
                mutex_lock(&intel_dp->psr.lock);
-               if (intel_dp->psr.panel_replay_enabled) {
-                       mutex_unlock(&intel_dp->psr.lock);
-                       break;
-               }
+               if (CAN_PANEL_REPLAY(intel_dp))
+                       block_dc_states = true;
 
-               if (intel_dp->psr.enabled && intel_dp->psr.pkg_c_latency_used)
+               if (intel_dp->psr.enabled && !intel_dp->psr.panel_replay_enabled &&
+                   intel_dp->psr.pkg_c_latency_used)
                        intel_psr_apply_underrun_on_idle_wa_locked(intel_dp);
 
                mutex_unlock(&intel_dp->psr.lock);
-               return;
        }
 
        /*
         * NOTE: intel_display_power_set_target_dc_state is used
-        * only by PSR * code for DC3CO handling. DC3CO target
+        * only by PSR code for DC3CO handling. DC3CO target
         * state is currently disabled in * PSR code. If DC3CO
         * is taken into use we need take that into account here
         * as well.
         */
-       intel_display_power_set_target_dc_state(display, enable ? DC_STATE_DISABLE :
-                                               DC_STATE_EN_UPTO_DC6);
+       if (block_dc_states)
+               intel_display_power_set_target_dc_state(display, enable ?
+                                                       DC_STATE_DISABLE :
+                                                       DC_STATE_EN_UPTO_DC6);
 }
 
 static void