]> git.ipfire.org Git - thirdparty/openwrt.git/commitdiff
realtek: pcs: rtl930x: use VTH/TAP helpers in calibration init
authorJonas Jelonek <jelonek.jonas@gmail.com>
Sun, 5 Jul 2026 13:17:35 +0000 (13:17 +0000)
committerJonas Jelonek <jelonek.jonas@gmail.com>
Mon, 6 Jul 2026 20:36:24 +0000 (22:36 +0200)
Replace the raw register writes in rxcal_init with the previously
cleaned-up VTH and TAP helpers. Beyond readability, this also fixes two
latent bugs in the original tap4 initialisation: tap4_even was written
twice (both to PAGE_ANA_10G_EXT 0x01[5:0]) and tap4_odd was never
written at all (PAGE_ANA_10G 0x06[11:6]). Using tap_set_value(sds, 4,
0, 0) writes both fields correctly.

Also apply stage-then-latch ordering to the VTH init: write the value
registers before asserting the manual bit, consistent with the rest of
the calibration lock path.

Link: https://github.com/openwrt/openwrt/pull/24091
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com>
target/linux/realtek/files-6.18/drivers/net/pcs/pcs-rtl-otto.c

index 11546cde0eda3dc92824c40cf31c1d3ce8e506d1..ca1173b10d2f60a9b546f45e0f0e47d0305f772c 100644 (file)
@@ -2364,20 +2364,15 @@ static void rtpcs_930x_sds_rxcal_init(struct rtpcs_serdes *sds, enum rtpcs_sds_m
        /* LEQ (Long Term Equivalent signal level) */
        rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x16, 14,  8, 0x00);
 
-       /* DFE (Decision Fed Equalizer) */
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G_EXT, 0x03,  5,  0, tap0_init_val);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x09, 11,  6, 0x00);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x09,  5,  0, 0x00);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x0a,  5,  0, 0x00);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G_EXT, 0x01,  5,  0, 0x00);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G_EXT, 0x12,  5,  0, 0x00);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x0a, 11,  6, 0x00);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x06,  5,  0, 0x00);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G_EXT, 0x01,  5,  0, 0x00);
-
-       /* Vth */
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x13,  5,  3, 0x07);
-       rtpcs_sds_write_bits(sds, PAGE_ANA_10G, 0x13,  2,  0, 0x07);
+       /* DFE (Decision Feedback Equalizer) TAPs */
+       rtpcs_930x_sds_rxcal_tap_set_value(sds, 0, tap0_init_val, 0);
+       rtpcs_930x_sds_rxcal_tap_set_value(sds, 1, 0, 0);
+       rtpcs_930x_sds_rxcal_tap_set_value(sds, 2, 0, 0);
+       rtpcs_930x_sds_rxcal_tap_set_value(sds, 3, 0, 0);
+       rtpcs_930x_sds_rxcal_tap_set_value(sds, 4, 0, 0);
+
+       /* VTH (Voltage Threshold) */
+       rtpcs_930x_sds_rxcal_vth_set_value(sds, 0x07, 0x07);
        rtpcs_sds_write_bits(sds, PAGE_ANA_10G_EXT, 0x0b,  5,  3, vth_min);
 
        /* --- 1.1.1 */