#define RSPI_SPSRC_CLEAR 0xfd80
#define RSPI_RESET_NUM 2
-#define RSPI_CLK_NUM 3
struct rzv2h_rspi_info {
+ const char *tclk_name;
unsigned int fifo_size;
+ unsigned int num_clks;
};
struct rzv2h_rspi_priv {
return PTR_ERR(rspi->base);
ret = devm_clk_bulk_get_all_enabled(dev, &clks);
- if (ret != RSPI_CLK_NUM)
+ if (ret != rspi->info->num_clks)
return dev_err_probe(dev, ret >= 0 ? -EINVAL : ret,
"cannot get clocks\n");
- for (i = 0; i < RSPI_CLK_NUM; i++) {
- if (!strcmp(clks[i].id, "tclk")) {
+ for (i = 0; i < rspi->info->num_clks; i++) {
+ if (!strcmp(clks[i].id, rspi->info->tclk_name)) {
rspi->tclk = clks[i].clk;
break;
}
}
static const struct rzv2h_rspi_info rzv2h_info = {
+ .tclk_name = "tclk",
.fifo_size = 16,
+ .num_clks = 3,
};
static const struct of_device_id rzv2h_rspi_match[] = {