static struct dw_mci_board pci_board_data = {
.caps = DW_MCI_CAPABILITIES,
- .bus_hz = 33 * 1000 * 1000,
};
static int dw_mci_pci_probe(struct pci_dev *pdev,
host->pdata = &pci_board_data;
host->fifo_depth = 32;
host->detect_delay_ms = 200;
+ host->bus_hz = 33 * 1000 * 1000;
ret = pcim_iomap_regions(pdev, 1 << PCI_BAR_NO, pci_name(pdev));
if (ret)
host->wm_aligned = true;
if (!device_property_read_u32(dev, "clock-frequency", &clock_frequency))
- pdata->bus_hz = clock_frequency;
+ host->bus_hz = clock_frequency;
if (drv_data && drv_data->parse_dt) {
ret = drv_data->parse_dt(host);
ret = PTR_ERR(host->ciu_clk);
if (ret == -EPROBE_DEFER)
goto err_clk_biu;
-
- host->bus_hz = host->pdata->bus_hz;
} else {
ret = clk_prepare_enable(host->ciu_clk);
if (ret) {
goto err_clk_biu;
}
- if (host->pdata->bus_hz) {
- ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz);
+ if (host->bus_hz) {
+ ret = clk_set_rate(host->ciu_clk, host->bus_hz);
if (ret)
dev_warn(host->dev,
"Unable to set bus rate to %uHz\n",
- host->pdata->bus_hz);
+ host->bus_hz);
}
host->bus_hz = clk_get_rate(host->ciu_clk);
}