arm64: dts: mediatek: mt7981b-openwrt-one: Enable Ethernet

Enable the Ethernet subsystem on OpenWrt One board with dual-MAC
configuration:
- GMAC0: Connected to external Airoha EN8811H 2.5GbE PHY via SGMII
  (2500base-x mode) for WAN connectivity with LED indicators
- GMAC1: Connected to internal MT7981 1GbE PHY (GMII mode) for LAN

Ethernet aliases are defined to provide consistent network interface
naming (ethernet0 = LAN, ethernet1 = WAN).

Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

diff --git a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts b/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts
index 7382599cfea299d61c17b7739f19707acacd1e30..2aea8990064532c03225fbc031ae93642040d482 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts
@@ -12,6 +12,8 @@
        model = "OpenWrt One";
 
        aliases {
+               ethernet0 = &gmac1;
+               ethernet1 = &gmac0;
                serial0 = &uart0;
        };
 
@@ -87,6 +89,58 @@
        };
 };
 
+&eth {
+       status = "okay";
+
+       /* WAN interface */
+       gmac0: mac@0 {
+               compatible = "mediatek,eth-mac";
+               reg = <0>;
+               nvmem-cells = <&wan_factory_mac 0>;
+               nvmem-cell-names = "mac-address";
+               phy-mode = "2500base-x";
+               phy-handle = <&phy15>;
+       };
+
+       /* LAN interface */
+       gmac1: mac@1 {
+               compatible = "mediatek,eth-mac";
+               reg = <1>;
+               phy-mode = "gmii";
+               phy-handle = <&int_gbe_phy>;
+       };
+};
+
+&mdio_bus {
+       phy15: ethernet-phy@f {
+               compatible = "ethernet-phy-id03a2.a411";
+               reg = <0xf>;
+               interrupt-parent = <&pio>;
+               interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
+               reset-gpios = <&pio 39 GPIO_ACTIVE_LOW>;
+               reset-assert-us = <10000>;
+               reset-deassert-us = <20000>;
+               airoha,pnswap-rx;
+
+               leds {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       led@0 {
+                               reg = <0>;
+                               function = LED_FUNCTION_WAN;
+                               color = <LED_COLOR_ID_AMBER>;
+                       };
+
+                       led@1 {
+                               reg = <1>;
+                               function = LED_FUNCTION_WAN;
+                               color = <LED_COLOR_ID_GREEN>;
+                       };
+               };
+       };
+};
+
 &pcie {
        pinctrl-names = "default";
        pinctrl-0 = <&pcie_pins>;
@@ -191,6 +245,10 @@
        };
 };
 
+&sgmiisys0 {
+       mediatek,pnswap;
+};
+
 &uart0 {
        status = "okay";
 };