mode = GET_MODE (x);
}
else if (VALID_MVE_PRED_MODE (mode))
- {
- if (CONST_INT_P (x))
- {
- if (mode == V8BImode || mode == V4BImode)
- {
- /* In V8BI or V4BI each element has 2 or 4 bits, if those bits
- aren't all the same, gen_lowpart might ICE. Canonicalize all
- the 2 or 4 bits to all ones if any of them is non-zero. V8BI
- and V4BI multi-bit masks are interpreted byte-by-byte at
- instruction level, but such constants should describe lanes,
- rather than bytes. See the section on MVE intrinsics in the
- Arm ACLE specification. */
- unsigned HOST_WIDE_INT xi = UINTVAL (x);
- xi |= ((xi & 0x5555) << 1) | ((xi & 0xaaaa) >> 1);
- if (mode == V4BImode)
- xi |= ((xi & 0x3333) << 2) | ((xi & 0xcccc) >> 2);
- if (xi != UINTVAL (x))
- warning_at (location, 0, "constant predicate argument %d"
- " (%wx) does not map to %d lane numbers,"
- " converted to %wx",
- opno, UINTVAL (x) & 0xffff,
- mode == V8BImode ? 8 : 4,
- xi & 0xffff);
-
- x = gen_int_mode (xi, HImode);
- }
- x = gen_lowpart (mode, x);
- }
- else
- x = force_lowpart_subreg (mode, x, GET_MODE (x));
- }
+ x = gen_lowpart (mode, x);
m_ops.safe_grow (m_ops.length () + 1, true);
create_input_operand (&m_ops.last (), x, mode);
int main (void)
{
- unsigned short p = 0x00FF;
+ unsigned short p = 0x00CC;
uint32_t a[] = {0, 0, 0, 0};
uint32_t b[] = {0, 0, 0, 0};
uint32x4_t v = vdupq_n_u32 (0xFFFFFFFFU);
void
__attribute__ ((noipa)) partial_write_cst (uint32_t *a, uint32x4_t v)
{
- vstrwq_p_u32 (a, v, 0x00FF);
+ vstrwq_p_u32 (a, v, 0x00CC);
}
-/* { dg-final { scan-assembler {mov\tr[0-9]+, #255} } } */
+/* { dg-final { scan-assembler {mov\tr[0-9]+, #204} } } */
+++ /dev/null
-/* { dg-do compile } */
-/* { dg-require-effective-target arm_v8_1m_mve_ok } */
-/* { dg-options "-O2" } */
-/* { dg-add-options arm_v8_1m_mve } */
-/* { dg-final { check-function-bodies "**" "" "" } } */
-
-#include <arm_mve.h>
-
-/*
-** test_32:
-**...
-** mov r[0-9]+, #65295 @ movhi
-**...
-*/
-uint32x4_t test_32() {
- /* V4BI predicate converted to 0xff0f. */
- return vdupq_m_n_u32(vdupq_n_u32(0xffffffff), 0, 0x4f02); /* { dg-warning {constant predicate argument 3 \(0x4f02\) does not map to 4 lane numbers, converted to 0xff0f} } */
-}
-
-/*
-** test_16:
-**...
-** mov r[0-9]+, #12339 @ movhi
-**...
-*/
-uint16x8_t test_16() {
- /* V8BI predicate converted to 0x3033. */
- return vdupq_m_n_u16(vdupq_n_u16(0xffff), 0, 0x3021); /* { dg-warning {constant predicate argument 3 \(0x3021\) does not map to 8 lane numbers, converted to 0x3033} } */
-}
-
-/*
-** test_8:
-**...
-** mov r[0-9]+, #23055 @ movhi
-**...
-*/
-uint8x16_t test_8() {
- return vdupq_m_n_u8(vdupq_n_u8(0xff), 0, 0x5a0f);
-}