]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Canonicalize (vec_merge (fma: op2 op1 op3) (match_dup 1)) mask) to (vec_merge (fma...
authorliuhongt <hongtao.liu@intel.com>
Mon, 14 Oct 2024 05:09:59 +0000 (13:09 +0800)
committerliuhongt <hongtao.liu@intel.com>
Thu, 17 Oct 2024 01:57:18 +0000 (09:57 +0800)
For masked FMA, there're 2 forms of RTL representation
1) (vec_merge (fma: op2 op1 op3) op1) mask)
2) (vec_merge (fma: op1 op2 op3) op1) mask)
It's because op1 op2 are communatative in RTL(the second op1 is
written as (match_dup 1))

we once tried to replace (match_dup 1)
with (match_operand:VFH_AVX512VL 5 "nonimmediate_operand" "0,0")), but
trigger an ICE in reload(reload can handle at most one operand with
"0" constraint).

So the patch do the canonicalizaton for the backend part.

gcc/ChangeLog:

PR target/117072
* config/i386/sse.md (<avx512>_fmadd_<mode>_mask<round_name>):
Relax predicates of fma operands from register_operand to
nonimmediate_operand.
(<avx512>_fmadd_<mode>_mask3<round_name>): Ditto.
(<avx512>_fmsub_<mode>_mask<round_name>): Ditto.
(<avx512>_fmsub_<mode>_mask3<round_name>): Ditto.
(<avx512>_fnmadd_<mode>_mask<round_name>): Ditto.
(<avx512>_fnmadd_<mode>_mask3<round_name>): Ditto.
(<avx512>_fnmsub_<mode>_mask<round_name>): Ditto.
(<avx512>_fnmsub_<mode>_mask3<round_name>): Ditto.
(<avx512>_fmaddsub_<mode>_mask3<round_name>): Ditto.
(<avx512>_fmsubadd_<mode>_mask<round_name>): Ditto.
(<avx512>_fmsubadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vmfmadd_<mode>_mask<round_name>): Ditto.
(avx512f_vmfmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vmfmadd_<mode>_maskz_1<round_name>): Ditto.
(*avx512f_vmfmsub_<mode>_mask<round_name>): Ditto.
(avx512f_vmfmsub_<mode>_mask3<round_name>): Ditto.
(*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Ditto.
(avx512f_vmfnmadd_<mode>_mask<round_name>): Ditto.
(avx512f_vmfnmadd_<mode>_mask3<round_name>): Ditto.
(avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Ditto.
(*avx512f_vmfnmsub_<mode>_mask<round_name>): Ditto.
(*avx512f_vmfnmsub_<mode>_mask3<round_name>): Ditto.
(*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Ditto.
(avx10_2_fmaddnepbf16_<mode>_mask3): Ditto.
(avx10_2_fnmaddnepbf16_<mode>_mask3): Ditto.
(avx10_2_fmsubnepbf16_<mode>_mask3): Ditto.
(avx10_2_fnmsubnepbf16_<mode>_mask3): Ditto.
(fmai_vmfmadd_<mode><round_name>): Swap operands[1] and operands[2].
(fmai_vmfmsub_<mode><round_name>): Ditto.
(fmai_vmfnmadd_<mode><round_name>): Ditto.
(fmai_vmfnmsub_<mode><round_name>): Ditto.
(*fmai_fmadd_<mode>): Swap operands[1] and operands[2] adjust
operands[1] predicates from register_operand to
nonimmediate_operand.
(*fmai_fmsub_<mode>): Ditto.
(*fmai_fnmadd_<mode><round_name>): Ditto.
(*fmai_fnmsub_<mode><round_name>): Ditto.

gcc/config/i386/sse.md

index 7be31334667756cce06f900671dd4dbe32f102ad..d8a05e223b3043cf0c7dfd31b66ada567617b522 100644 (file)
   [(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v,v")
        (vec_merge:VFH_AVX512VL
          (fma:VFH_AVX512VL
-           (match_operand:VFH_AVX512VL 1 "register_operand" "0,0")
+           (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0")
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>,v")
            (match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>" "v,<round_constraint>"))
          (match_dup 1)
          (fma:VFH_AVX512VL
            (match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v")
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")
-           (match_operand:VFH_AVX512VL 3 "register_operand" "0"))
+           (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0"))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX512F && <round_mode_condition>"
   [(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v,v")
        (vec_merge:VFH_AVX512VL
          (fma:VFH_AVX512VL
-           (match_operand:VFH_AVX512VL 1 "register_operand" "0,0")
+           (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0")
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>,v")
            (neg:VFH_AVX512VL
              (match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>" "v,<round_constraint>")))
            (match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v")
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")
            (neg:VFH_AVX512VL
-             (match_operand:VFH_AVX512VL 3 "register_operand" "0")))
+             (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0")))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX512F && <round_mode_condition>"
        (vec_merge:VFH_AVX512VL
          (fma:VFH_AVX512VL
            (neg:VFH_AVX512VL
-             (match_operand:VFH_AVX512VL 1 "register_operand" "0,0"))
+             (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0"))
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>,v")
            (match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>" "v,<round_constraint>"))
          (match_dup 1)
            (neg:VFH_AVX512VL
              (match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v"))
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")
-           (match_operand:VFH_AVX512VL 3 "register_operand" "0"))
+           (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0"))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX512F && <round_mode_condition>"
        (vec_merge:VFH_AVX512VL
          (fma:VFH_AVX512VL
            (neg:VFH_AVX512VL
-             (match_operand:VFH_AVX512VL 1 "register_operand" "0,0"))
+             (match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0"))
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>,v")
            (neg:VFH_AVX512VL
              (match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>" "v,<round_constraint>")))
              (match_operand:VFH_AVX512VL 1 "<round_nimm_predicate>" "%v"))
            (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")
            (neg:VFH_AVX512VL
-             (match_operand:VFH_AVX512VL 3 "register_operand" "0")))
+             (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0")))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX512F && <round_mode_condition>"
   [(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v")
        (vec_merge:VFH_AVX512VL
          (unspec:VFH_AVX512VL
-           [(match_operand:VFH_AVX512VL 1 "register_operand" "v")
+           [(match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "v")
             (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")
-            (match_operand:VFH_AVX512VL 3 "register_operand" "0")]
+            (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0")]
            UNSPEC_FMADDSUB)
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   [(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v,v")
        (vec_merge:VFH_AVX512VL
          (unspec:VFH_AVX512VL
-           [(match_operand:VFH_AVX512VL 1 "register_operand" "0,0")
+           [(match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "0,0")
             (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>,v")
             (neg:VFH_AVX512VL
               (match_operand:VFH_AVX512VL 3 "<round_nimm_predicate>" "v,<round_constraint>"))]
   [(set (match_operand:VFH_AVX512VL 0 "register_operand" "=v")
        (vec_merge:VFH_AVX512VL
          (unspec:VFH_AVX512VL
-           [(match_operand:VFH_AVX512VL 1 "register_operand" "v")
+           [(match_operand:VFH_AVX512VL 1 "nonimmediate_operand" "v")
             (match_operand:VFH_AVX512VL 2 "<round_nimm_predicate>" "<round_constraint>")
             (neg:VFH_AVX512VL
-              (match_operand:VFH_AVX512VL 3 "register_operand" "0"))]
+              (match_operand:VFH_AVX512VL 3 "nonimmediate_operand" "0"))]
            UNSPEC_FMADDSUB)
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   [(set (match_operand:VFH_128 0 "register_operand")
        (vec_merge:VFH_128
          (fma:VFH_128
-           (match_operand:VFH_128 1 "register_operand")
+           (match_operand:VFH_128 1 "nonimmediate_operand")
            (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
            (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"))
          (match_dup 1)
   [(set (match_operand:VFH_128 0 "register_operand")
        (vec_merge:VFH_128
          (fma:VFH_128
-           (match_operand:VFH_128 1 "register_operand")
+           (match_operand:VFH_128 1 "nonimmediate_operand")
            (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
            (neg:VFH_128
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>")))
        (vec_merge:VFH_128
          (fma:VFH_128
            (neg:VFH_128
-             (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"))
-           (match_operand:VFH_128 1 "register_operand")
+             (match_operand:VFH_128 1 "nonimmediate_operand"))
+           (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
            (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>"))
          (match_dup 1)
          (const_int 1)))]
        (vec_merge:VFH_128
          (fma:VFH_128
            (neg:VFH_128
-             (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>"))
-           (match_operand:VFH_128 1 "register_operand")
+             (match_operand:VFH_128 1 "nonimmediate_operand"))
+           (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>")
            (neg:VFH_128
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>")))
          (match_dup 1)
   [(set (match_operand:VFH_128 0 "register_operand" "=v,v")
         (vec_merge:VFH_128
          (fma:VFH_128
-           (match_operand:VFH_128 1 "register_operand" "0,0")
+           (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
            (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>, v")
            (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
          (match_dup 1)
   [(set (match_operand:VFH_128 0 "register_operand" "=v,v")
         (vec_merge:VFH_128
          (fma:VFH_128
-           (match_operand:VFH_128   1 "register_operand" "0,0")
+           (match_operand:VFH_128   1 "nonimmediate_operand" "0,0")
            (match_operand:VFH_128   2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
            (neg:VFH_128
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
         (vec_merge:VFH_128
          (fma:VFH_128
            (neg:VFH_128
-             (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
-           (match_operand:VFH_128   1 "register_operand" "0,0")
+             (match_operand:VFH_128   1 "nonimmediate_operand" "0,0"))
+           (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
            (match_operand:VFH_128   3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
          (match_dup 1)
          (const_int 1)))]
         (vec_merge:VFH_128
          (fma:VFH_128
            (neg:VFH_128
-             (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
-           (match_operand:VFH_128   1 "register_operand" "0,0")
+             (match_operand:VFH_128   1 "nonimmediate_operand" "0,0"))
+           (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
            (neg:VFH_128
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
          (match_dup 1)
        (vec_merge:VFH_128
          (vec_merge:VFH_128
            (fma:VFH_128
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+             (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
              (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
            (match_dup 1)
            (fma:VFH_128
              (match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
              (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>")
-             (match_operand:VFH_128 3 "register_operand" "0"))
+             (match_operand:VFH_128 3 "nonimmediate_operand" "0"))
            (match_dup 3)
            (match_operand:QI 4 "register_operand" "Yk"))
          (match_dup 3)
        (vec_merge:VFH_128
          (vec_merge:VFH_128
            (fma:VFH_128
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+             (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
              (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
            (match_operand:VFH_128 4 "const0_operand")
        (vec_merge:VFH_128
          (vec_merge:VFH_128
            (fma:VFH_128
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+             (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
              (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
              (neg:VFH_128
                (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
              (match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
              (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>")
              (neg:VFH_128
-               (match_operand:VFH_128 3 "register_operand" "0")))
+               (match_operand:VFH_128 3 "nonimmediate_operand" "0")))
            (match_dup 3)
            (match_operand:QI 4 "register_operand" "Yk"))
          (match_dup 3)
        (vec_merge:VFH_128
          (vec_merge:VFH_128
            (fma:VFH_128
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+             (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
              (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
              (neg:VFH_128
                (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
          (vec_merge:VFH_128
            (fma:VFH_128
              (neg:VFH_128
-               (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+               (match_operand:VFH_128 1 "nonimmediate_operand" "0,0"))
+               (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
            (match_dup 1)
            (match_operand:QI 4 "register_operand" "Yk,Yk"))
              (neg:VFH_128
                (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>"))
              (match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
-             (match_operand:VFH_128 3 "register_operand" "0"))
+             (match_operand:VFH_128 3 "nonimmediate_operand" "0"))
            (match_dup 3)
            (match_operand:QI 4 "register_operand" "Yk"))
          (match_dup 3)
            (fma:VFH_128
              (neg:VFH_128
                (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+             (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
              (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>"))
            (match_operand:VFH_128 4 "const0_operand")
            (match_operand:QI 5 "register_operand" "Yk,Yk"))
          (vec_merge:VFH_128
            (fma:VFH_128
              (neg:VFH_128
-               (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+               (match_operand:VFH_128 1 "nonimmediate_operand" "0,0"))
+               (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v")
              (neg:VFH_128
                (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
            (match_dup 1)
                (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>"))
              (match_operand:VFH_128 1 "<round_nimm_scalar_predicate>" "%v")
              (neg:VFH_128
-               (match_operand:VFH_128 3 "register_operand" "0")))
+               (match_operand:VFH_128 3 "nonimmediate_operand" "0")))
            (match_dup 3)
            (match_operand:QI 4 "register_operand" "Yk"))
          (match_dup 3)
            (fma:VFH_128
              (neg:VFH_128
                (match_operand:VFH_128 2 "<round_nimm_scalar_predicate>" "<round_constraint>,v"))
-             (match_operand:VFH_128 1 "register_operand" "0,0")
+             (match_operand:VFH_128 1 "nonimmediate_operand" "0,0")
              (neg:VFH_128
                (match_operand:VFH_128 3 "<round_nimm_scalar_predicate>" "v,<round_constraint>")))
            (match_operand:VFH_128 4 "const0_operand")
          (fma:VBF_AVX10_2
             (match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v")
             (match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
-            (match_operand:VBF_AVX10_2 3 "register_operand" "0"))
+            (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0"))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX10_2_256"
             (neg:VBF_AVX10_2
              (match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v"))
            (match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
-           (match_operand:VBF_AVX10_2 3 "register_operand" "0"))
+           (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0"))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX10_2_256"
             (match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v")
             (match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
              (neg:VBF_AVX10_2
-              (match_operand:VBF_AVX10_2 3 "register_operand" "0")))
+              (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0")))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX10_2_256"
              (match_operand:VBF_AVX10_2 1 "nonimmediate_operand" "%v"))
            (match_operand:VBF_AVX10_2 2 "nonimmediate_operand" "vm")
             (neg:VBF_AVX10_2
-             (match_operand:VBF_AVX10_2 3 "register_operand" "0")))
+             (match_operand:VBF_AVX10_2 3 "nonimmediate_operand" "0")))
          (match_dup 3)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
   "TARGET_AVX10_2_256"