wifi: rtw89: 8922d: add set channel with pre-/post- helpers

The main set channel function calls MAC/BB/RF ones, and pre-/post- helpers
are called before/after the main function to backup/restore and
stop/restart circuits, including TX scheduler, PPDU status, DACK and TSSI.

Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20260330065847.48946-3-pkshih@realtek.com

diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index e64bd74db83a2da432937d4ecee3bb360bc2bd4b..195d4806c4efe054e9c4f117edf1d250ab770534 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -8445,6 +8445,8 @@
 #define RR_MOD_M_RXBB GENMASK(9, 5)
 #define RR_MOD_LO_SEL BIT(1)
 #define RR_MODOPT 0x01
+#define RR_MODOPT_V1 0x10001
+#define RR_SW_SEL BIT(19)
 #define RR_TXG_SEL GENMASK(19, 17)
 #define RR_MODOPT_M_TXPWR GENMASK(5, 0)
 #define RR_WLSEL 0x02
@@ -10527,6 +10529,8 @@
 
 #define R_TXPWR_RSTB0_BE4 0x2250C
 #define B_TXPWR_RSTB0_BE4 BIT(16)
+#define R_TSSI_EN_P0_BE4 0x22510
+#define B_TSSI_EN_P0_BE4 GENMASK(3, 0)
 #define R_TXPWR_RSTB1_BE4 0x2260C
 #define B_TXPWR_RSTB1_BE4 BIT(16)
 
@@ -10640,6 +10644,16 @@
 #define R_RX_PATH0_TBL0_BE4 0x2E028
 #define R_RX_PATH1_TBL0_BE4 0x2E128
 
+#define R_KTBL0A_BE4 0x38104
+#define R_KTBL0B_BE4 0x38204
+#define B_KTBL0_IDX0 GENMASK(1, 0)
+#define B_KTBL0_IDX1 GENMASK(9, 8)
+#define B_KTBL0_RST BIT(31)
+#define R_KTBL1A_BE4 0x38154
+#define R_KTBL1B_BE4 0x38254
+#define B_KTBL1_TBL0 BIT(3)
+#define B_KTBL1_TBL1 BIT(5)
+
 /* WiFi CPU local domain */
 #define R_AX_WDT_CTRL 0x0040
 #define B_AX_WDT_EN BIT(31)

diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 51b025d898ffaa42d92132d909329c20befcdb8b..a2dd504c99ed4c0ec09962efde9d461f5ee5e603 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -2066,6 +2066,108 @@ static void rtw8922d_set_channel_bb(struct rtw89_dev *rtwdev,
        rtw8922d_tssi_reset(rtwdev, RF_PATH_AB, phy_idx);
 }
 
+static void rtw8922d_pre_set_channel_bb(struct rtw89_dev *rtwdev,
+                                       enum rtw89_phy_idx phy_idx)
+{
+       if (!rtwdev->dbcc_en)
+               return;
+
+       rtw89_phy_write32_mask(rtwdev, R_SYS_DBCC_BE4, B_SYS_DBCC_BE4, 0x0);
+
+       if (phy_idx == RTW89_PHY_0) {
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xBBBB);
+               fsleep(1);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_BB_CLK_BE4, 0x3);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xAFFF);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xEBAD);
+               fsleep(1);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_BB_CLK_BE4, 0x0);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xEAAD);
+       } else {
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xBBBB);
+               fsleep(1);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_BB_CLK_BE4, 0x3);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xAFFF);
+               fsleep(1);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xEFFF);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_BB_CLK_BE4, 0x0);
+               rtw89_phy_write32_mask(rtwdev, R_EMLSR_SWITCH_BE4, B_EMLSR_SWITCH_BE4, 0xEEFF);
+       }
+
+       fsleep(1);
+}
+
+static void rtw8922d_post_set_channel_bb(struct rtw89_dev *rtwdev,
+                                        enum rtw89_mlo_dbcc_mode mode,
+                                        enum rtw89_phy_idx phy_idx)
+{
+       if (!rtwdev->dbcc_en)
+               return;
+
+       rtw8922d_ctrl_mlo(rtwdev, mode, true);
+}
+
+static void rtw8922d_set_channel(struct rtw89_dev *rtwdev,
+                                const struct rtw89_chan *chan,
+                                enum rtw89_mac_idx mac_idx,
+                                enum rtw89_phy_idx phy_idx)
+{
+       rtw8922d_set_channel_mac(rtwdev, chan, mac_idx);
+       rtw8922d_set_channel_bb(rtwdev, chan, phy_idx);
+       rtw8922d_set_channel_rf(rtwdev, chan, phy_idx);
+}
+
+static void __rtw8922d_dack_reset(struct rtw89_dev *rtwdev, enum rtw89_rf_path path)
+{
+       rtw89_phy_write32_mask(rtwdev, 0x3c000 + (path << 8), BIT(17), 0x0);
+       rtw89_phy_write32_mask(rtwdev, 0x3c000 + (path << 8), BIT(17), 0x1);
+}
+
+static void rtw8922d_dack_reset(struct rtw89_dev *rtwdev)
+{
+       __rtw8922d_dack_reset(rtwdev, RF_PATH_A);
+       __rtw8922d_dack_reset(rtwdev, RF_PATH_B);
+}
+
+static
+void rtw8922d_hal_reset(struct rtw89_dev *rtwdev,
+                       enum rtw89_phy_idx phy_idx, enum rtw89_mac_idx mac_idx,
+                       enum rtw89_band band, u32 *tx_en, bool enter)
+{
+       if (enter) {
+               rtw89_chip_stop_sch_tx(rtwdev, mac_idx, tx_en, RTW89_SCH_TX_SEL_ALL);
+               rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, false);
+               rtw8922d_dack_reset(rtwdev);
+               rtw8922d_tssi_cont_en_phyidx(rtwdev, false, phy_idx);
+               fsleep(40);
+               rtw8922d_bb_reset_en(rtwdev, band, false, phy_idx);
+       } else {
+               rtw89_mac_cfg_ppdu_status(rtwdev, mac_idx, true);
+               rtw8922d_tssi_cont_en_phyidx(rtwdev, true, phy_idx);
+               rtw8922d_bb_reset_en(rtwdev, band, true, phy_idx);
+               rtw89_chip_resume_sch_tx(rtwdev, mac_idx, *tx_en);
+       }
+}
+
+static void rtw8922d_set_channel_help(struct rtw89_dev *rtwdev, bool enter,
+                                     struct rtw89_channel_help_params *p,
+                                     const struct rtw89_chan *chan,
+                                     enum rtw89_mac_idx mac_idx,
+                                     enum rtw89_phy_idx phy_idx)
+{
+       if (enter) {
+               rtw8922d_pre_set_channel_bb(rtwdev, phy_idx);
+               rtw8922d_pre_set_channel_rf(rtwdev, phy_idx);
+       }
+
+       rtw8922d_hal_reset(rtwdev, phy_idx, mac_idx, chan->band_type, &p->tx_en, enter);
+
+       if (!enter) {
+               rtw8922d_post_set_channel_bb(rtwdev, rtwdev->mlo_dbcc_mode, phy_idx);
+               rtw8922d_post_set_channel_rf(rtwdev, phy_idx);
+       }
+}
+
 MODULE_FIRMWARE(RTW8922D_MODULE_FIRMWARE);
 MODULE_FIRMWARE(RTW8922DS_MODULE_FIRMWARE);
 MODULE_AUTHOR("Realtek Corporation");

diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.c b/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.c
index 6b35d196cb81f97fc0b883fece9af0299cab501b..d1eda19a39a947109cffe403568b81e02ce99235 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.c
@@ -2,11 +2,40 @@
 /* Copyright(c) 2026  Realtek Corporation
  */
 
+#include "chan.h"
+#include "debug.h"
 #include "phy.h"
 #include "reg.h"
 #include "rtw8922d.h"
 #include "rtw8922d_rfk.h"
 
+static void rtw8922d_tssi_cont_en(struct rtw89_dev *rtwdev, bool en,
+                                 enum rtw89_rf_path path, u8 phy_idx)
+{
+       static const u32 tssi_trk_man[2] = {R_TSSI_EN_P0_BE4,
+                                           R_TSSI_EN_P0_BE4 + 0x100};
+
+       if (en)
+               rtw89_phy_write32_idx(rtwdev, tssi_trk_man[path],
+                                     B_TSSI_CONT_EN, 0, phy_idx);
+       else
+               rtw89_phy_write32_idx(rtwdev, tssi_trk_man[path],
+                                     B_TSSI_CONT_EN, 1, phy_idx);
+}
+
+void rtw8922d_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, u8 phy_idx)
+{
+       if (rtwdev->mlo_dbcc_mode == MLO_1_PLUS_1_1RF) {
+               if (phy_idx == RTW89_PHY_0)
+                       rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_A, phy_idx);
+               else
+                       rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_B, phy_idx);
+       } else {
+               rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_A, phy_idx);
+               rtw8922d_tssi_cont_en(rtwdev, en, RF_PATH_B, phy_idx);
+       }
+}
+
 static
 void rtw8922d_ctl_band_ch_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy,
                             const struct rtw89_chan *chan)
@@ -31,3 +60,204 @@ void rtw8922d_set_channel_rf(struct rtw89_dev *rtwdev,
 {
        rtw8922d_ctl_band_ch_bw(rtwdev, phy_idx, chan);
 }
+
+enum _rf_syn_pow {
+       RF_SYN_ON_OFF,
+       RF_SYN_OFF_ON,
+       RF_SYN_ALLON,
+       RF_SYN_ALLOFF,
+};
+
+static void rtw8922d_set_syn01(struct rtw89_dev *rtwdev, enum _rf_syn_pow syn)
+{
+       rtw89_debug(rtwdev, RTW89_DBG_RFK, "SYN config=%d\n", syn);
+
+       if (syn == RF_SYN_ALLON) {
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, BIT(1), 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, BIT(1), 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0xf);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0xf);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x1);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x1);
+       } else if (syn == RF_SYN_ON_OFF) {
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, BIT(1), 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0xf);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, MASKDWORD, 0x1);
+       } else if (syn == RF_SYN_OFF_ON) {
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, BIT(1), 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0xf);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, MASKDWORD, 0x1);
+       } else if (syn == RF_SYN_ALLOFF) {
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN_V1, 0x0);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_POW, RR_POW_SYN_V1, 0x0);
+       }
+}
+
+static void rtw8922d_chlk_ktbl_sel(struct rtw89_dev *rtwdev, u8 kpath, u8 idx)
+{
+       bool mlo_linking = false;
+
+       if (idx > 2) {
+               rtw89_warn(rtwdev, "[DBCC][ERROR]indx is out of limit!! index(%d)", idx);
+               return;
+       }
+
+       if (mlo_linking) {
+               if (kpath & RF_A) {
+                       rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RR_SW_SEL, 0x0);
+                       rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT_V1, RR_SW_SEL, 0x0);
+               }
+
+               if (kpath & RF_B) {
+                       rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RR_SW_SEL, 0x0);
+                       rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT_V1, RR_SW_SEL, 0x0);
+               }
+
+               return;
+       }
+
+       if (kpath & RF_A) {
+               rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_RST, 0x1);
+               rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_IDX0, idx);
+               rtw89_phy_write32_mask(rtwdev, R_KTBL0A_BE4, B_KTBL0_IDX1, idx);
+
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RR_TXG_SEL, 0x4 | idx);
+               rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT_V1, RR_TXG_SEL, 0x4 | idx);
+
+               rtw89_phy_write32_mask(rtwdev, R_KTBL1A_BE4, B_KTBL1_TBL0, idx & BIT(0));
+               rtw89_phy_write32_mask(rtwdev, R_KTBL1A_BE4, B_KTBL1_TBL1, (idx & BIT(1)) >> 1);
+       }
+
+       if (kpath & RF_B) {
+               rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_RST, 0x1);
+               rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_IDX0, idx);
+               rtw89_phy_write32_mask(rtwdev, R_KTBL0B_BE4, B_KTBL0_IDX1, idx);
+
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RR_TXG_SEL, 0x4 | idx);
+               rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT_V1, RR_TXG_SEL, 0x4 | idx);
+
+               rtw89_phy_write32_mask(rtwdev, R_KTBL1B_BE4, B_KTBL1_TBL0, idx & BIT(0));
+               rtw89_phy_write32_mask(rtwdev, R_KTBL1B_BE4, B_KTBL1_TBL1, (idx & BIT(1)) >> 1);
+       }
+}
+
+static u8 rtw8922d_chlk_reload_sel_tbl(struct rtw89_dev *rtwdev,
+                                      const struct rtw89_chan *chan, u8 path)
+{
+       struct rtw89_rfk_mcc_info_data *rfk_mcc = rtwdev->rfk_mcc.data;
+       struct rtw89_rfk_chan_desc desc[__RTW89_RFK_CHS_NR_V1] = {};
+       u8 tbl_sel;
+
+       for (tbl_sel = 0; tbl_sel < ARRAY_SIZE(desc); tbl_sel++) {
+               struct rtw89_rfk_chan_desc *p = &desc[tbl_sel];
+
+               p->ch = rfk_mcc->ch[tbl_sel];
+
+               p->has_band = true;
+               p->band = rfk_mcc->band[tbl_sel];
+
+               p->has_bw = true;
+               p->bw = rfk_mcc->bw[tbl_sel];
+       }
+
+       tbl_sel = rtw89_rfk_chan_lookup(rtwdev, desc, ARRAY_SIZE(desc), chan);
+
+       rfk_mcc->ch[tbl_sel] = chan->channel;
+       rfk_mcc->band[tbl_sel] = chan->band_type;
+       rfk_mcc->bw[tbl_sel] = chan->band_width;
+       rfk_mcc->rf18[tbl_sel] = rtw89_chip_chan_to_rf18_val(rtwdev, chan);
+
+       /* shared table array, but tbl_sel can be independent by path */
+       rfk_mcc[path].table_idx = tbl_sel;
+
+       return tbl_sel;
+}
+
+static void rtw8922d_chlk_reload(struct rtw89_dev *rtwdev)
+{
+       const struct rtw89_chan *chan0, *chan1;
+       u8 s0_tbl, s1_tbl;
+
+       switch (rtwdev->mlo_dbcc_mode) {
+       default:
+       case MLO_2_PLUS_0_1RF:
+               chan0 = rtw89_mgnt_chan_get(rtwdev, 0);
+               chan1 = chan0;
+               break;
+       case MLO_0_PLUS_2_1RF:
+               chan1 = rtw89_mgnt_chan_get(rtwdev, 1);
+               chan0 = chan1;
+               break;
+       case MLO_1_PLUS_1_1RF:
+               chan0 = rtw89_mgnt_chan_get(rtwdev, 0);
+               chan1 = rtw89_mgnt_chan_get(rtwdev, 1);
+               break;
+       }
+
+       s0_tbl = rtw8922d_chlk_reload_sel_tbl(rtwdev, chan0, 0);
+       s1_tbl = rtw8922d_chlk_reload_sel_tbl(rtwdev, chan1, 1);
+
+       rtw8922d_chlk_ktbl_sel(rtwdev, RF_A, s0_tbl);
+       rtw8922d_chlk_ktbl_sel(rtwdev, RF_B, s1_tbl);
+}
+
+static enum _rf_syn_pow rtw8922d_get_syn_pow(struct rtw89_dev *rtwdev)
+{
+       switch (rtwdev->mlo_dbcc_mode) {
+       case MLO_0_PLUS_2_1RF:
+               return RF_SYN_OFF_ON;
+       case MLO_0_PLUS_2_2RF:
+       case MLO_1_PLUS_1_2RF:
+       case MLO_2_PLUS_0_1RF:
+       case MLO_2_PLUS_0_2RF:
+       case MLO_2_PLUS_2_2RF:
+       case MLO_DBCC_NOT_SUPPORT:
+       default:
+               return RF_SYN_ON_OFF;
+       case MLO_1_PLUS_1_1RF:
+       case DBCC_LEGACY:
+               return RF_SYN_ALLON;
+       }
+}
+
+void rtw8922d_rfk_mlo_ctrl(struct rtw89_dev *rtwdev)
+{
+       enum _rf_syn_pow syn_pow = rtw8922d_get_syn_pow(rtwdev);
+
+       if (!rtwdev->dbcc_en)
+               goto set_rfk_reload;
+
+       rtw8922d_set_syn01(rtwdev, syn_pow);
+
+set_rfk_reload:
+       rtw8922d_chlk_reload(rtwdev);
+}
+
+void rtw8922d_pre_set_channel_rf(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
+{
+       bool mlo_1_1;
+
+       if (!rtwdev->dbcc_en)
+               return;
+
+       mlo_1_1 = rtw89_is_mlo_1_1(rtwdev);
+       if (mlo_1_1)
+               rtw8922d_set_syn01(rtwdev, RF_SYN_ALLON);
+       else if (phy_idx == RTW89_PHY_0)
+               rtw8922d_set_syn01(rtwdev, RF_SYN_ON_OFF);
+       else
+               rtw8922d_set_syn01(rtwdev, RF_SYN_OFF_ON);
+
+       fsleep(1000);
+}
+
+void rtw8922d_post_set_channel_rf(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx)
+{
+       rtw8922d_rfk_mlo_ctrl(rtwdev);
+}

diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.h b/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.h
index 03af1f0497acbf552193c7670168b8bbc2b6441c..4c505ae24261b50a7b878550cb0c22855d018038 100644 (file)
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.h
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d_rfk.h
@@ -7,8 +7,12 @@
 
 #include "core.h"
 
+void rtw8922d_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, u8 phy_idx);
 void rtw8922d_set_channel_rf(struct rtw89_dev *rtwdev,
                             const struct rtw89_chan *chan,
                             enum rtw89_phy_idx phy_idx);
+void rtw8922d_rfk_mlo_ctrl(struct rtw89_dev *rtwdev);
+void rtw8922d_pre_set_channel_rf(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx);
+void rtw8922d_post_set_channel_rf(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx);
 
 #endif