]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
LoongArch: Redundant sign extension elimination optimization 2.
authorLi Wei <liwei@loongson.cn>
Thu, 11 Jan 2024 11:36:33 +0000 (19:36 +0800)
committerLulu Cheng <chenglulu@loongson.cn>
Fri, 12 Jan 2024 01:48:06 +0000 (09:48 +0800)
Eliminate the redundant sign extension that exists after the conditional
move when the target register is SImode.

gcc/ChangeLog:

* config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
Adjust.

gcc/testsuite/ChangeLog:

* gcc.target/loongarch/sign-extend-2.c: Adjust.

gcc/config/loongarch/loongarch.cc
gcc/testsuite/gcc.target/loongarch/sign-extend-2.c

index 27435aa5b501c41c8900874fe824188d66ed42d6..3b8559bfdc85cc01c6008c637c4240eae3598dd9 100644 (file)
@@ -5371,6 +5371,12 @@ loongarch_expand_conditional_move (rtx *operands)
          rtx temp3 = gen_reg_rtx (mode);
          emit_insn (gen_rtx_SET (temp3, gen_rtx_IOR (mode, temp, temp2)));
          temp3 = gen_lowpart (GET_MODE (operands[0]), temp3);
+         /* Nonzero in a subreg if it was made when accessing an object that
+            was promoted to a wider mode in accord with the PROMOTED_MODE
+            machine description macro.  */
+         SUBREG_PROMOTED_VAR_P (temp3) = 1;
+         /* Sets promoted mode for SUBREG_PROMOTED_VAR_P.  */
+         SUBREG_PROMOTED_SET (temp3, SRP_SIGNED);
          loongarch_emit_move (operands[0], temp3);
        }
       else
index a45dde4f73fcea8f279fe851d04840ab30af7a54..e57a2727d0c2bb8f097f27e9126b5a9eaf967685 100644 (file)
@@ -1,6 +1,7 @@
 /* { dg-do compile } */
-/* { dg-options "-mabi=lp64d -O2" } */
-/* { dg-final { scan-assembler-times "slli.w\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,0" 1 } } */
+/* { dg-options "-mabi=lp64d -O2 -fdump-rtl-expand" } */
+/* { dg-final { scan-rtl-dump "subreg/s" "expand" } } */
+/* { dg-final { scan-assembler-not "slli.w\t\\\$r\[0-9\]+,\\\$r\[0-9\]+,0" } } */
 
 #include <stdint.h>
 #define my_min(x, y) ((x) < (y) ? (x) : (y))