u32 queue)
{
struct stmmac_rx_queue *rx_q = &dma_conf->rx_queue[queue];
+ struct dma_desc *desc;
int i;
/* Clear the RX descriptors */
- for (i = 0; i < dma_conf->dma_rx_size; i++)
+ for (i = 0; i < dma_conf->dma_rx_size; i++) {
if (priv->extend_desc)
- stmmac_init_rx_desc(priv, &rx_q->dma_erx[i].basic,
- priv->use_riwt, priv->mode,
- (i == dma_conf->dma_rx_size - 1),
- dma_conf->dma_buf_sz);
+ desc = &rx_q->dma_erx[i].basic;
else
- stmmac_init_rx_desc(priv, &rx_q->dma_rx[i],
- priv->use_riwt, priv->mode,
- (i == dma_conf->dma_rx_size - 1),
- dma_conf->dma_buf_sz);
+ desc = &rx_q->dma_rx[i];
+
+ stmmac_init_rx_desc(priv, desc, priv->use_riwt, priv->mode,
+ (i == dma_conf->dma_rx_size - 1),
+ dma_conf->dma_buf_sz);
+ }
}
/**