ARM. (Not that it's actually necessary, but still ..)
git-svn-id: svn://svn.valgrind.org/vex/trunk@2465
//case Ijk_EmWarn: trcval = VEX_TRC_JMP_EMWARN; break;
//case Ijk_MapFail: trcval = VEX_TRC_JMP_MAPFAIL; break;
case Ijk_NoDecode: trcval = VEX_TRC_JMP_NODECODE; break;
- //case Ijk_TInval: trcval = VEX_TRC_JMP_TINVAL; break;
+ case Ijk_TInval: trcval = VEX_TRC_JMP_TINVAL; break;
case Ijk_NoRedir: trcval = VEX_TRC_JMP_NOREDIR; break;
//case Ijk_SigTRAP: trcval = VEX_TRC_JMP_SIGTRAP; break;
//case Ijk_SigSEGV: trcval = VEX_TRC_JMP_SIGSEGV; break;
case Ijk_NoDecode:
case Ijk_NoRedir:
case Ijk_Sys_syscall:
+ case Ijk_TInval:
{
HReg r = iselIntExpr_R(env, IRExpr_Const(stmt->Ist.Exit.dst));
addInstr(env, ARMInstr_XAssisted(r, amR15T, cc,