arm64: dts: rp1: Add support for RaspberryPi's RP1 device

RaspberryPi RP1 is a multi function PCI endpoint device that
exposes several subperipherals via PCI BAR.

Add a dtb overlay that will be compiled into a binary blob
and linked in the RP1 driver.

This overlay offers just minimal support to represent the
RP1 device itself, the sub-peripherals will be added by
future patches.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://lore.kernel.org/r/20250529135052.28398-6-andrea.porta@suse.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

diff --git a/arch/arm64/boot/dts/broadcom/rp1-common.dtsi b/arch/arm64/boot/dts/broadcom/rp1-common.dtsi
new file mode 100644 (file)
index 0000000..5002a37
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/rp1-common.dtsi
@@ -0,0 +1,42 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/clock/raspberrypi,rp1-clocks.h>
+
+pci_ep_bus: pci-ep-bus@1 {
+       compatible = "simple-bus";
+       ranges = <0x00 0x40000000  0x01 0x00 0x00000000  0x00 0x00400000>;
+       dma-ranges = <0x10 0x00000000  0x43000000 0x10 0x00000000  0x10 0x00000000>;
+       #address-cells = <2>;
+       #size-cells = <2>;
+
+       rp1_clocks: clocks@40018000 {
+               compatible = "raspberrypi,rp1-clocks";
+               reg = <0x00 0x40018000 0x0 0x10038>;
+               #clock-cells = <1>;
+               clocks = <&clk_rp1_xosc>;
+               assigned-clocks = <&rp1_clocks RP1_PLL_SYS_CORE>,
+                                 <&rp1_clocks RP1_PLL_SYS>,
+                                 <&rp1_clocks RP1_PLL_SYS_SEC>,
+                                 <&rp1_clocks RP1_CLK_SYS>;
+               assigned-clock-rates = <1000000000>, // RP1_PLL_SYS_CORE
+                                      <200000000>,  // RP1_PLL_SYS
+                                      <125000000>,  // RP1_PLL_SYS_SEC
+                                      <200000000>;  // RP1_CLK_SYS
+       };
+
+       rp1_gpio: pinctrl@400d0000 {
+               compatible = "raspberrypi,rp1-gpio";
+               reg = <0x00 0x400d0000  0x0 0xc000>,
+                     <0x00 0x400e0000  0x0 0xc000>,
+                     <0x00 0x400f0000  0x0 0xc000>;
+               gpio-controller;
+               #gpio-cells = <2>;
+               interrupt-controller;
+               #interrupt-cells = <2>;
+               interrupts = <0 IRQ_TYPE_LEVEL_HIGH>,
+                            <1 IRQ_TYPE_LEVEL_HIGH>,
+                            <2 IRQ_TYPE_LEVEL_HIGH>;
+       };
+};

diff --git a/arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi b/arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi
new file mode 100644 (file)
index 0000000..0ef30d7
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/rp1-nexus.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+
+rp1_nexus {
+       compatible = "pci1de4,1";
+       #address-cells = <3>;
+       #size-cells = <2>;
+       ranges = <0x01 0x00 0x00000000
+                 0x02000000 0x00 0x00000000
+                 0x0 0x400000>;
+       interrupt-controller;
+       #interrupt-cells = <2>;
+
+       #include "rp1-common.dtsi"
+};