arm64: dts: rockchip: Enable PCIe for ArmSoM Sige1

Enable the RTL8125 network controller and corresponding PHY
connected via PCIe on the ArmSoM Sige1.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://patch.msgid.link/20260106100000.225445-1-amadeus@jmu.edu.cn
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
index 6e21579365a5b794f2e74092a050953f6f2489c4..c41af8fc0c8d14fbb8369c3e41fa08a03e3cc1f0 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-armsom-sige1.dts
@@ -232,6 +232,10 @@
        };
 };
 
+&combphy {
+       status = "okay";
+};
+
 &cpu0 {
        cpu-supply = <&vdd_arm>;
 };
@@ -293,6 +297,14 @@
        };
 };
 
+&pcie {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pcie20_perstn>;
+       reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
+       vpcie3v3-supply = <&vcc_3v3>;
+       status = "okay";
+};
+
 &pinctrl {
        bluetooth {
                bt_reg_on_h: bt-reg-on-h {
@@ -324,6 +336,12 @@
                };
        };
 
+       pcie {
+               pcie20_perstn: pcie20-perstn {
+                       rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        rtc {
                rtc_int_l: rtc-int-l {
                        rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;