If this pattern is not defined, then a plain compare pattern and
conditional branch pattern is used.
+@cindex @code{tag_memory} instruction pattern
+This pattern tags an object that begins at the address specified by
+operand 0, has the byte size indicated by the operand 2, and uses the
+tag from operand 1.
+
@cindex @code{clear_cache} instruction pattern
@item @samp{clear_cache}
This pattern, if defined, flushes the instruction cache for a region of
DEF_TARGET_INSN (stack_protect_test, (rtx x0, rtx x1, rtx x2))
DEF_TARGET_INSN (store_multiple, (rtx x0, rtx x1, rtx x2))
DEF_TARGET_INSN (tablejump, (rtx x0, rtx x1))
+DEF_TARGET_INSN (tag_memory, (rtx x0, rtx x1, rtx x2))
DEF_TARGET_INSN (trap, (void))
DEF_TARGET_INSN (unique, (void))
DEF_TARGET_INSN (untyped_call, (rtx x0, rtx x1, rtx x2))