]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: lg: Add missing PL011 "uartclk"
authorRob Herring (Arm) <robh@kernel.org>
Mon, 9 Jun 2025 21:54:57 +0000 (16:54 -0500)
committerArnd Bergmann <arnd@arndb.de>
Thu, 3 Jul 2025 14:29:28 +0000 (16:29 +0200)
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
LG131x SoCs are missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Link: https://lore.kernel.org/r/20250609-dt-lg-fixes-v1-2-e210e797c2d7@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm64/boot/dts/lg/lg131x.dtsi

index dc4229bd9ebb616032f8455aa61aaa0339fc08b2..4cb1e451089752a12298d271e97187f0e634f664 100644 (file)
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfe000000 0x1000>;
                        interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clk_bus>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clk_bus>, <&clk_bus>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
                uart1: serial@fe100000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfe100000 0x1000>;
                        interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clk_bus>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clk_bus>, <&clk_bus>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
                uart2: serial@fe200000 {
                        compatible = "arm,pl011", "arm,primecell";
                        reg = <0x0 0xfe200000 0x1000>;
                        interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&clk_bus>;
-                       clock-names = "apb_pclk";
+                       clocks = <&clk_bus>, <&clk_bus>;
+                       clock-names = "uartclk", "apb_pclk";
                        status = "disabled";
                };
                spi0: spi@fe800000 {